Message ID | 1595403506-8209-3-git-send-email-claudiu.beznea@microchip.com (mailing list archive) |
---|---|
State | Accepted, archived |
Headers | show |
Series | clk: at91: add sama7g5 clock support | expand |
Quoting Claudiu Beznea (2020-07-22 00:38:10) > Check best_rate against available clock ranges. > > Fixes: df70aeef6083 ("clk: at91: add generated clock driver") > Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> > Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> > --- Applied to clk-next
diff --git a/drivers/clk/at91/clk-generated.c b/drivers/clk/at91/clk-generated.c index 995a13133cfb..f8e557e0e1b8 100644 --- a/drivers/clk/at91/clk-generated.c +++ b/drivers/clk/at91/clk-generated.c @@ -185,8 +185,8 @@ static int clk_generated_determine_rate(struct clk_hw *hw, __clk_get_name((req->best_parent_hw)->clk), req->best_parent_rate); - if (best_rate < 0) - return best_rate; + if (best_rate < 0 || (gck->range.max && best_rate > gck->range.max)) + return -EINVAL; req->rate = best_rate; return 0;