[v3,0/2] Fix the issue of failed speed limit lifting

Message

Jiwei Sun Jan. 22, 2025, 8:06 a.m. UTC

From: Jiwei Sun <[e-mail]>

Since commit de9a6c8d5dbf ("PCI/bwctrl: Add pcie_set_target_speed() to set
PCIe Link Speed"), there are two potential issues in the function
pcie_failed_link_retrain().

(1) The macro PCIE_LNKCTL2_TLS2SPEED() and PCIE_LNKCAP_SLS2SPEED() just
uses the link speed field of the registers. However, there are many other
different function fields in the Link Control 2 Register or the Link
Capabilities Register. If the register value is directly used by the two
macros, it may cause getting an error link speed value (PCI_SPEED_UNKNOWN).

(2) In the pcie_failed_link_retrain(), the local variable lnkctl2 is not
changed after reading from PCI_EXP_LNKCTL2. It might cause that the
removing 2.5GT/s downstream link speed restriction codes are not executed.

In order to avoid the above-mentioned potential issues, only keep link
speed field of the two registers before using and reread the Link Control 2
Register before using.

This series focuses on the first patch of the original series [1]. The
second one of the original series will submitted via the other single
patch.

[1] https://lore.kernel.org/linux-pci/[e-mail]/
---
v3 changes:
 - add fix tag in the commit messages of first patch
 - add an empty line after the local variable definition in the macro
 - adjust the position of reading the Link Control 2 register in the code

v2 changes:
 - divide the two issues into different patches
 - get fixed inside the macros

Jiwei Sun (2):
  PCI: Fix the wrong reading of register fields
  PCI: Adjust the position of reading the Link Control 2 register

 drivers/pci/pci.h    | 32 +++++++++++++++++++-------------
 drivers/pci/quirks.c |  6 ++++--
 2 files changed, 23 insertions(+), 15 deletions(-)