Show patches with: Submitter = Ben Widawsky       |   200 patches
« 1 2 »
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v5,01/15] cxl/region: Add region creation ABI [v5,01/15] cxl/region: Add region creation ABI - - - --- 2022-02-17 Ben Widawsky Handled Elsewhere
[v4,01/14] cxl/region: Add region creation ABI [v4,01/14] cxl/region: Add region creation ABI - - - --- 2022-02-17 Ben Widawsky Handled Elsewhere
[v3,14/14] cxl/region: Create an nd_region CXL Region driver - - - --- 2022-01-28 Ben Widawsky Not Applicable
[v3,13/14] cxl/pmem: Convert nvdimm bridge API to use dev CXL Region driver - - - --- 2022-01-28 Ben Widawsky Not Applicable
[v3,12/14] cxl: Program decoders for regions CXL Region driver - - - --- 2022-01-28 Ben Widawsky Not Applicable
[v3,11/14] cxl/region: Add support for single switch level CXL Region driver - - - --- 2022-01-28 Ben Widawsky Not Applicable
[v3,10/14] cxl/region: Collect host bridge decoders CXL Region driver - - - --- 2022-01-28 Ben Widawsky Not Applicable
[v3,09/14] cxl/region: Add infrastructure for decoder programming CXL Region driver - - - --- 2022-01-28 Ben Widawsky Not Applicable
[v3,08/14] cxl/region: HB port config verification CXL Region driver - - - --- 2022-01-28 Ben Widawsky Not Applicable
[v3,07/14] cxl/region: Implement XHB verification CXL Region driver - - - --- 2022-01-28 Ben Widawsky Not Applicable
[v3,06/14] cxl/region: Address space allocation CXL Region driver - - - --- 2022-01-28 Ben Widawsky Not Applicable
[v3,05/14] cxl/acpi: Handle address space allocation CXL Region driver - - - --- 2022-01-28 Ben Widawsky Not Applicable
[v3,04/14] cxl/region: Introduce a cxl_region driver CXL Region driver - - - --- 2022-01-28 Ben Widawsky Not Applicable
[v3,03/14] cxl/mem: Cache port created by the mem dev CXL Region driver - - - --- 2022-01-28 Ben Widawsky Not Applicable
[v3,02/14] cxl/region: Introduce concept of region configuration CXL Region driver - - - --- 2022-01-28 Ben Widawsky Not Applicable
[v3,01/14] cxl/region: Add region creation ABI CXL Region driver - - - --- 2022-01-28 Ben Widawsky Not Applicable
[v2,15/15] cxl/region: Create an nd_region CXL Region driver - - - --- 2022-01-12 Ben Widawsky bhelgaas Superseded
[v2,14/15] cxl/pmem: Convert nvdimm bridge API to use memdev CXL Region driver - - - --- 2022-01-12 Ben Widawsky bhelgaas Superseded
[v2,13/15] cxl: Program decoders for regions CXL Region driver - - - --- 2022-01-12 Ben Widawsky bhelgaas Superseded
[v2,12/15] cxl/region: Collect host bridge decoders CXL Region driver - - - --- 2022-01-12 Ben Widawsky bhelgaas Superseded
[v2,11/15] cxl/region: Add infrastructure for decoder programming CXL Region driver - - - --- 2022-01-12 Ben Widawsky bhelgaas Superseded
[v2,10/15] cxl/region: HB port config verification CXL Region driver - - - --- 2022-01-12 Ben Widawsky bhelgaas Superseded
[v2,09/15] cxl/region: Implement XHB verification CXL Region driver - - - --- 2022-01-12 Ben Widawsky bhelgaas Superseded
[v2,08/15] cxl/region: Address space allocation CXL Region driver - - - --- 2022-01-12 Ben Widawsky bhelgaas Superseded
[v2,07/15] cxl/acpi: Handle address space allocation CXL Region driver - - - --- 2022-01-12 Ben Widawsky bhelgaas Superseded
[v2,06/15] cxl/region: Introduce a cxl_region driver CXL Region driver - - - --- 2022-01-12 Ben Widawsky bhelgaas Superseded
[v2,05/15] cxl/mem: Cache port created by the mem dev CXL Region driver - - - --- 2022-01-12 Ben Widawsky bhelgaas Superseded
[v2,04/15] cxl/region: Introduce concept of region configuration CXL Region driver - - - --- 2022-01-12 Ben Widawsky bhelgaas Superseded
[v2,03/15] cxl/region: Add region creation ABI CXL Region driver - - - --- 2022-01-12 Ben Widawsky bhelgaas Superseded
[v2,02/15] cxl/core: Track port depth CXL Region driver - - - --- 2022-01-12 Ben Widawsky bhelgaas Superseded
[v2,01/15] cxl/core: Rename find_cxl_port CXL Region driver - - - --- 2022-01-12 Ben Widawsky bhelgaas Superseded
[13/13] cxl: Program decoders for regions CXL Region driver - - - --- 2022-01-07 Ben Widawsky bhelgaas Superseded
[12/13] cxl/region: Record host bridge target list CXL Region driver - - - --- 2022-01-07 Ben Widawsky bhelgaas Superseded
[11/13] cxl/region: Add infrastructure for decoder programming CXL Region driver - - - --- 2022-01-07 Ben Widawsky bhelgaas Superseded
[10/13] cxl/region: HB port config verification CXL Region driver - - - --- 2022-01-07 Ben Widawsky bhelgaas Superseded
[09/13] cxl/region: Implement XHB verification CXL Region driver - - - --- 2022-01-07 Ben Widawsky bhelgaas Superseded
[08/13] cxl/region: Address space allocation CXL Region driver - - - --- 2022-01-07 Ben Widawsky bhelgaas Superseded
[07/13] cxl/acpi: Handle address space allocation CXL Region driver - - - --- 2022-01-07 Ben Widawsky bhelgaas Superseded
[06/13] cxl/region: Introduce a cxl_region driver CXL Region driver - - - --- 2022-01-07 Ben Widawsky bhelgaas Superseded
[05/13] cxl/mem: Cache port created by the mem dev CXL Region driver - - - --- 2022-01-07 Ben Widawsky bhelgaas Superseded
[04/13] cxl/region: Introduce concept of region configuration CXL Region driver - - - --- 2022-01-07 Ben Widawsky bhelgaas Superseded
[03/13] cxl/region: Add region creation ABI CXL Region driver - - - --- 2022-01-07 Ben Widawsky bhelgaas Superseded
[02/13] cxl/core: Track port depth CXL Region driver - - - --- 2022-01-07 Ben Widawsky bhelgaas Superseded
[01/13] cxl/core: Rename find_cxl_port CXL Region driver - - - --- 2022-01-07 Ben Widawsky bhelgaas Superseded
[23/23] cxl/mem: Disable switch hierarchies for now Add drivers for CXL ports and mem devices - - - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[22/23] cxl/mem: Introduce cxl_mem driver Add drivers for CXL ports and mem devices - - - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[21/23] cxl: Unify port enumeration for decoders Add drivers for CXL ports and mem devices - 1 - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[20/23] cxl/port: Introduce a port driver Add drivers for CXL ports and mem devices - - - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[19/23] cxl/pci: Store component register base in cxlds Add drivers for CXL ports and mem devices - - - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[18/23] cxl/pci: Implement wait for media active Add drivers for CXL ports and mem devices - - - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[17/23] cxl: Cache and pass DVSEC ranges Add drivers for CXL ports and mem devices - - - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[16/23] cxl/pci: Cache device DVSEC offset Add drivers for CXL ports and mem devices - - - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[15/23] cxl/core: Store global list of root ports Add drivers for CXL ports and mem devices - - - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[14/23] cxl: Introduce topology host registration Add drivers for CXL ports and mem devices - 1 - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[13/23] cxl/core: Move target population locking to caller Add drivers for CXL ports and mem devices - 2 - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[12/23] cxl: Introduce endpoint decoders Add drivers for CXL ports and mem devices - - - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[11/23] cxl/core: Document and tighten up decoder APIs Add drivers for CXL ports and mem devices - 2 - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[10/23] cxl/core: Convert decoder range to resource Add drivers for CXL ports and mem devices - 2 - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[09/23] cxl: Introduce module_cxl_driver Add drivers for CXL ports and mem devices - 2 - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[08/23] cxl/acpi: Map component registers for Root Ports Add drivers for CXL ports and mem devices - - - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[07/23] cxl/pci: Add new DVSEC definitions Add drivers for CXL ports and mem devices - 2 - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[06/23] cxl/pci: Don't check media status for mbox access Add drivers for CXL ports and mem devices - 1 - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[05/23] cxl/pci: Don't poll doorbell for mailbox access Add drivers for CXL ports and mem devices - 1 - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[04/23] cxl/pci: Implement Interface Ready Timeout Add drivers for CXL ports and mem devices - - - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[03/23] cxl/pci: Extract device status check Add drivers for CXL ports and mem devices - 1 - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[02/23] cxl: Flesh out register names Add drivers for CXL ports and mem devices - 2 - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[01/23] cxl: Rename CXL_MEM to CXL_PCI Add drivers for CXL ports and mem devices - 2 - --- 2021-11-20 Ben Widawsky bhelgaas Handled Elsewhere
[v2,9/9] iommu/vt-d: Use pci core's DVSEC functionality [v2,1/9] cxl: Convert "RBI" to enum - - - --- 2021-09-23 Ben Widawsky Not Applicable
[v2,8/9] ocxl: Use pci core's DVSEC functionality [v2,1/9] cxl: Convert "RBI" to enum 1 1 - --- 2021-09-23 Ben Widawsky Not Applicable
[v2,7/9] cxl/pci: Use pci core's DVSEC functionality [v2,1/9] cxl: Convert "RBI" to enum - - - --- 2021-09-23 Ben Widawsky Not Applicable
[v2,6/9] PCI: Add pci_find_dvsec_capability to find designated VSEC [v2,1/9] cxl: Convert "RBI" to enum 1 3 1 --- 2021-09-23 Ben Widawsky Not Applicable
[v2,5/9] cxl/pci: Make more use of cxl_register_map [v2,1/9] cxl: Convert "RBI" to enum - - - --- 2021-09-23 Ben Widawsky Not Applicable
[v2,4/9] cxl/pci: Refactor cxl_pci_setup_regs [v2,1/9] cxl: Convert "RBI" to enum - - - --- 2021-09-23 Ben Widawsky Not Applicable
[v2,3/9] cxl/pci: Remove pci request/release regions [v2,1/9] cxl: Convert "RBI" to enum - 1 - --- 2021-09-23 Ben Widawsky Not Applicable
[v2,2/9] cxl/pci: Remove dev_dbg for unknown register blocks [v2,1/9] cxl: Convert "RBI" to enum - 1 - --- 2021-09-23 Ben Widawsky Not Applicable
[v2,1/9] cxl: Convert "RBI" to enum [v2,1/9] cxl: Convert "RBI" to enum - - - --- 2021-09-23 Ben Widawsky Not Applicable
[v2,0/9] cxl_pci refactor for reusability - - - --- 2021-09-23 Ben Widawsky Not Applicable
[7/7] ocxl: Use pci core's DVSEC functionality cxl_pci refactor for reusability 1 - - --- 2021-09-21 Ben Widawsky Not Applicable
[6/7] cxl/pci: Use pci core's DVSEC functionality cxl_pci refactor for reusability - - - --- 2021-09-21 Ben Widawsky Not Applicable
[5/7] PCI: Add pci_find_dvsec_capability to find designated VSEC cxl_pci refactor for reusability - 1 - --- 2021-09-21 Ben Widawsky Not Applicable
[4/7] cxl/pci: Make more use of cxl_register_map cxl_pci refactor for reusability - - - --- 2021-09-21 Ben Widawsky Not Applicable
[3/7] cxl/pci: Refactor cxl_pci_setup_regs cxl_pci refactor for reusability - - - --- 2021-09-21 Ben Widawsky Not Applicable
[2/7] cxl/pci: Remove dev_dbg for unknown register blocks cxl_pci refactor for reusability - - - --- 2021-09-21 Ben Widawsky Not Applicable
[1/7] cxl: Convert "RBI" to enum cxl_pci refactor for reusability - - - --- 2021-09-21 Ben Widawsky Not Applicable
[v2,6/9] cxl: Implement more device DVSEC decoding Untitled series #495521 - - - --- 2021-06-07 Ben Widawsky bhelgaas Not Applicable
[9/9] cxl: Add placeholder for undecoded DVSECs Add CXL 2.0 DVSEC Decoding - - - --- 2021-06-04 Ben Widawsky bhelgaas Not Applicable
[8/9] cxl: Add DVSEC Register Locator Add CXL 2.0 DVSEC Decoding - - - --- 2021-06-04 Ben Widawsky bhelgaas Not Applicable
[7/9] cxl: Add support for DVSEC port cap Add CXL 2.0 DVSEC Decoding - - - --- 2021-06-04 Ben Widawsky bhelgaas Not Applicable
[6/9] cxl: Implement more device DVSEC decoding Add CXL 2.0 DVSEC Decoding - - - --- 2021-06-04 Ben Widawsky bhelgaas Not Applicable
[5/9] cxl: Rename caps to be device caps Add CXL 2.0 DVSEC Decoding - - - --- 2021-06-04 Ben Widawsky bhelgaas Not Applicable
[4/9] cxl: Rework caps to new function Add CXL 2.0 DVSEC Decoding - - - --- 2021-06-04 Ben Widawsky bhelgaas Not Applicable
[3/9] cxl: Collect all DVSEC Device fields Add CXL 2.0 DVSEC Decoding - - - --- 2021-06-04 Ben Widawsky bhelgaas Not Applicable
[2/9] cxl: Make id check more explicit Add CXL 2.0 DVSEC Decoding - - - --- 2021-06-04 Ben Widawsky bhelgaas Not Applicable
[1/9] cxl: Rename variable to match other code Add CXL 2.0 DVSEC Decoding - - - --- 2021-06-04 Ben Widawsky bhelgaas Not Applicable
[v2,4/7] cxl/mem: Get rid of @cxlm.base Untitled series #486055 1 - - --- 2021-05-20 Ben Widawsky Not Applicable
cxl: Rename mem to pci cxl: Rename mem to pci - - - --- 2021-05-04 Ben Widawsky bhelgaas Not Applicable
[v2] cxl/mem: Fix register block offset calculation [v2] cxl/mem: Fix register block offset calculation - - - --- 2021-04-16 Ben Widawsky Accepted
[3/3] cxl/mem: Demarcate vendor specific capability IDs Untitled series #468123 - - - --- 2021-04-15 Ben Widawsky bhelgaas Not Applicable
[3/3] cxl/mem: Demarcate vendor specific capability IDs [1/3] cxl/mem: Fix register block offset calculation - - - --- 2021-04-15 Ben Widawsky Superseded
[2/3] cxl/mem: Print unknown capability IDs as hex [1/3] cxl/mem: Fix register block offset calculation - - - --- 2021-04-15 Ben Widawsky Superseded
« 1 2 »