| Message ID | 20201213183759.223246-15-aford173@gmail.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | arm64: dts: renesas: Cleanup Beacon Kit and support more SoC's | expand |
On Sun, Dec 13, 2020 at 7:38 PM Adam Ford <aford173@gmail.com> wrote: > For greater compatibility with upcoming kits that will reuse the baseboard > and SOM-level files, adjust the I2C speeds to make it the most compatible > with all devices. > > Signed-off-by: Adam Ford <aford173@gmail.com> Thanks, all i2c devices on the bus support 400 kHz. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v5.12. Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi index 200236b6e0ef..7f499282f851 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi @@ -343,7 +343,7 @@ &hsusb { &i2c2 { status = "okay"; - clock-frequency = <100000>; + clock-frequency = <400000>; pinctrl-0 = <&i2c2_pins>; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi index b093a34b0fa0..b5ba45261c0b 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi @@ -110,7 +110,7 @@ &hscif2 { &i2c4 { status = "okay"; - clock-frequency = <400000>; + clock-frequency = <100000>; pca9654: gpio@20 { compatible = "onnn,pca9654";
For greater compatibility with upcoming kits that will reuse the baseboard and SOM-level files, adjust the I2C speeds to make it the most compatible with all devices. Signed-off-by: Adam Ford <aford173@gmail.com> --- arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi | 2 +- arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)