| Message ID | 20201213183759.223246-16-aford173@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | arm64: dts: renesas: Cleanup Beacon Kit and support more SoC's | expand |
On Sun, Dec 13, 2020 at 7:38 PM Adam Ford <aford173@gmail.com> wrote: > In preparation for adding new dev kits, move anything specific to the > RZ/G2M from the SOM-level and baseboard-levels and move them to the > kit-level. This allows the SOM and baseboard to be reused with > other SoC's. > > Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v5.12. Gr{oetje,eeting}s, Geert
Hi Adam, On Thu, Dec 17, 2020 at 12:41 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > On Sun, Dec 13, 2020 at 7:38 PM Adam Ford <aford173@gmail.com> wrote: > > In preparation for adding new dev kits, move anything specific to the > > RZ/G2M from the SOM-level and baseboard-levels and move them to the > > kit-level. This allows the SOM and baseboard to be reused with > > other SoC's. > > > > Signed-off-by: Adam Ford <aford173@gmail.com> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > i.e. will queue in renesas-devel for v5.12. Sorry, spoke too soon. What happened to: - pinctrl-0 = <&du_pins>; - pinctrl-names = "default"; - status = "okay"; Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi index 7f499282f851..facb3e6d8010 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi @@ -273,21 +273,6 @@ &can1 { status = "okay"; }; -&du { - pinctrl-0 = <&du_pins>; - pinctrl-names = "default"; - status = "okay"; - - clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 722>, - <&versaclock5 1>, - <&x302_clk>, - <&versaclock5 2>; - clock-names = "du.0", "du.1", "du.2", - "dclkin.0", "dclkin.1", "dclkin.2"; -}; - &du_out_rgb { remote-endpoint = <&rgb_panel>; }; diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi index b5ba45261c0b..d68e9f5b8b38 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi @@ -13,11 +13,6 @@ memory@48000000 { reg = <0x0 0x48000000 0x0 0x78000000>; }; - memory@600000000 { - device_type = "memory"; - reg = <0x6 0x00000000 0x0 0x80000000>; - }; - osc_32k: osc_32k { compatible = "fixed-clock"; #clock-cells = <0>; diff --git a/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts b/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts index 2c5b057c30c6..581e4ec36bcb 100644 --- a/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts +++ b/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts @@ -26,4 +26,20 @@ aliases { chosen { stdout-path = "serial0:115200n8"; }; + + memory@600000000 { + device_type = "memory"; + reg = <0x6 0x00000000 0x0 0x80000000>; + }; +}; + +&du { + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 722>, + <&versaclock5 1>, + <&x302_clk>, + <&versaclock5 2>; + clock-names = "du.0", "du.1", "du.2", + "dclkin.0", "dclkin.1", "dclkin.2"; };
In preparation for adding new dev kits, move anything specific to the RZ/G2M from the SOM-level and baseboard-levels and move them to the kit-level. This allows the SOM and baseboard to be reused with other SoC's. Signed-off-by: Adam Ford <aford173@gmail.com> --- .../dts/renesas/beacon-renesom-baseboard.dtsi | 15 --------------- .../boot/dts/renesas/beacon-renesom-som.dtsi | 5 ----- .../dts/renesas/r8a774a1-beacon-rzg2m-kit.dts | 16 ++++++++++++++++ 3 files changed, 16 insertions(+), 20 deletions(-)