Show patches with: State = Action Required       |    Archived = No       |   2039 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[v2,4/4] hw/core: fix platform bus node name QEMU: Fix RISC-V virt & spike machines' dtbs - 1 - --- 2022-08-08 Conor Dooley New
[v2,3/4] hw/riscv: virt: fix syscon subnode paths QEMU: Fix RISC-V virt & spike machines' dtbs - 1 - --- 2022-08-08 Conor Dooley New
[v2,2/4] hw/riscv: virt: Fix the plic's address cells QEMU: Fix RISC-V virt & spike machines' dtbs - 1 - --- 2022-08-08 Conor Dooley New
[v2,1/4] hw/riscv: virt: fix uart node name QEMU: Fix RISC-V virt & spike machines' dtbs - 1 - --- 2022-08-08 Conor Dooley New
[RFC,4/4] riscv: cmpxchg: Remove unused cmpxchg(64)_local riscv: Add basic percpu operations - - - --- 2022-08-08 Guo Ren New
[RFC,3/4] riscv: percpu: Implement this_cpu operations riscv: Add basic percpu operations - - - --- 2022-08-08 Guo Ren New
[RFC,2/4] arm64: percpu: Use generic PERCPU_RW_OPS riscv: Add basic percpu operations - - - --- 2022-08-08 Guo Ren New
[RFC,1/4] vmstat: percpu: Rename HAVE_CMPXCHG_LOCAL to HAVE_CMPXCHG_PERCPU_BYTE riscv: Add basic percpu operations - - - --- 2022-08-08 Guo Ren New
[V9,15/15] csky: spinlock: Use the generic header files arch: Add qspinlock support and atomic cleanup - - - --- 2022-08-08 Guo Ren New
[V9,14/15] openrisc: Move from ticket-lock to qspinlock arch: Add qspinlock support and atomic cleanup - - - --- 2022-08-08 Guo Ren New
[V9,13/15] openrisc: cmpxchg: Cleanup unnecessary codes arch: Add qspinlock support and atomic cleanup - - - --- 2022-08-08 Guo Ren New
[V9,12/15] riscv: Add combo spinlock support arch: Add qspinlock support and atomic cleanup - - - --- 2022-08-08 Guo Ren New
[V9,11/15] riscv: Add qspinlock support arch: Add qspinlock support and atomic cleanup - - - --- 2022-08-08 Guo Ren New
[V9,10/15] riscv: Enable ARCH_INLINE_READ*/WRITE*/SPIN* arch: Add qspinlock support and atomic cleanup - - - --- 2022-08-08 Guo Ren New
[V9,09/15] riscv: cmpxchg: Optimize cmpxchg64 arch: Add qspinlock support and atomic cleanup - - - --- 2022-08-08 Guo Ren New
[V9,08/15] riscv: cmpxchg: Forbid arch_cmpxchg64 for 32-bit arch: Add qspinlock support and atomic cleanup - - - --- 2022-08-08 Guo Ren New
[V9,07/15] riscv: cmpxchg: Remove xchg32 and xchg64 arch: Add qspinlock support and atomic cleanup - - - --- 2022-08-08 Guo Ren New
[V9,06/15] riscv: atomic: Clean up unnecessary acquire and release definitions arch: Add qspinlock support and atomic cleanup - - - --- 2022-08-08 Guo Ren New
[V9,05/15] asm-generic: spinlock: Add queued spinlock support in common header arch: Add qspinlock support and atomic cleanup - - - --- 2022-08-08 Guo Ren New
[V9,04/15] asm-generic: ticket-lock: Keep ticket-lock the same semantic with qspinlock arch: Add qspinlock support and atomic cleanup - - - --- 2022-08-08 Guo Ren New
[V9,03/15] asm-generic: ticket-lock: Move into ticket_spinlock.h arch: Add qspinlock support and atomic cleanup - - - --- 2022-08-08 Guo Ren New
[V9,02/15] asm-generic: ticket-lock: Use the same struct definitions with qspinlock arch: Add qspinlock support and atomic cleanup - - - --- 2022-08-08 Guo Ren New
[V9,01/15] asm-generic: ticket-lock: Remove unnecessary atomic_read arch: Add qspinlock support and atomic cleanup - - - --- 2022-08-08 Guo Ren New
[v2] kernel/sys_ni: add compat entry for fadvise64_64 [v2] kernel/sys_ni: add compat entry for fadvise64_64 - 1 - --- 2022-08-07 Randy Dunlap New
asm-generic: unistd.h: make 'compat_sys_fadvise64_64' conditional asm-generic: unistd.h: make 'compat_sys_fadvise64_64' conditional - - - --- 2022-08-07 Randy Dunlap New
riscv: compat: make __ARCH_WANT_COMPAT_FADVISE64_64 conditional riscv: compat: make __ARCH_WANT_COMPAT_FADVISE64_64 conditional - - - --- 2022-08-07 Randy Dunlap New
[GIT,PULL] RISC-V Patches for the 5.20 Merge Window, Part 1 [GIT,PULL] RISC-V Patches for the 5.20 Merge Window, Part 1 - - - --- 2022-08-05 Palmer Dabbelt New
spi: microchip-core: Simplify some error message spi: microchip-core: Simplify some error message - 1 - --- 2022-08-05 Christophe JAILLET New
[3/3] dt-bindings: riscv: add new riscv,isa strings for emulators Fix dt-validate issues on qemu dtbdumps due to dt-bindings - - - --- 2022-08-05 Conor Dooley New
[2/3] dt-bindings: interrupt-controller: sifive,plic: add legacy riscv compatible Fix dt-validate issues on qemu dtbdumps due to dt-bindings - - - --- 2022-08-05 Conor Dooley New
[1/3] dt-bindings: timer: sifive,clint: add legacy riscv compatible Fix dt-validate issues on qemu dtbdumps due to dt-bindings - - - --- 2022-08-05 Conor Dooley New
[5/5] hw/core: fix platform bus node name QEMU: Fix RISC-V virt & spike machines' dtbs - 1 - --- 2022-08-05 Conor Dooley New
[4/5] hw/riscv: virt: fix syscon subnode paths QEMU: Fix RISC-V virt & spike machines' dtbs - 1 - --- 2022-08-05 Conor Dooley New
[3/5] hw/riscv: virt: Fix the plic's address cells QEMU: Fix RISC-V virt & spike machines' dtbs - 1 - --- 2022-08-05 Conor Dooley New
[2/5] hw/riscv: virt: fix uart node name QEMU: Fix RISC-V virt & spike machines' dtbs - 1 - --- 2022-08-05 Conor Dooley New
[1/5] target/riscv: Ignore the S and U letters when formatting ISA strings QEMU: Fix RISC-V virt & spike machines' dtbs - - - --- 2022-08-05 Conor Dooley New
MAINTAINERS: add PolarFire SoC dt bindings MAINTAINERS: add PolarFire SoC dt bindings 1 - - --- 2022-08-05 Conor Dooley New
[3/3] mailbox: mpfs: account for mbox offsets while sending MPFS mailbox fixes - - - --- 2022-08-05 Conor Dooley New
[2/3] mailbox: mpfs: fix handling of the reg property MPFS mailbox fixes - - - --- 2022-08-05 Conor Dooley New
[1/3] dt-bindings: mailbox: fix the mpfs' reg property MPFS mailbox fixes - 1 - --- 2022-08-05 Conor Dooley New
[V2] uapi: Fixup strace compile error [V2] uapi: Fixup strace compile error 1 - - --- 2022-08-04 Guo Ren New
dt-bindings: riscv: fix SiFive l2-cache's cache-sets dt-bindings: riscv: fix SiFive l2-cache's cache-sets - 1 - --- 2022-08-03 Conor Dooley New
[v4] dt-bindings: gpio: sifive: add gpio-line-names [v4] dt-bindings: gpio: sifive: add gpio-line-names 1 - - --- 2022-08-03 Conor Dooley New
[V5,6/6] RISC-V: Fixup schedule out issue in machine_crash_shutdown() RISC-V fixups to work with crash tool - - - --- 2022-08-02 Xianting Tian New
[V5,5/6] riscv: crash_core: Export kernel vm layout, phys_ram_base RISC-V fixups to work with crash tool - - - --- 2022-08-02 Xianting Tian New
[V5,4/6] RISC-V: Fixup getting correct current pc RISC-V fixups to work with crash tool - - - --- 2022-08-02 Xianting Tian New
[V5,3/6] riscv: Add modules to virtual kernel memory layout dump RISC-V fixups to work with crash tool - 2 - --- 2022-08-02 Xianting Tian New
[V5,2/6] RISC-V: Add arch_crash_save_vmcoreinfo support RISC-V fixups to work with crash tool - - - --- 2022-08-02 Xianting Tian New
[V5,1/6] RISC-V: use __smp_processor_id() instead of smp_processor_id() RISC-V fixups to work with crash tool - 3 - --- 2022-08-02 Xianting Tian New
[v8,27/31] Kbuild: add Rust support Rust support - - - --- 2022-08-02 Miguel Ojeda New
[Crash-utility,V2,9/9] RISCV64: Add the implementation of symbol verify Support RISCV64 arch and common commands - - - --- 2022-08-01 Xianting Tian New
[Crash-utility,V2,8/9] RISCV64: Add 'mach' command support Support RISCV64 arch and common commands - - - --- 2022-08-01 Xianting Tian New
[Crash-utility,V2,7/9] RISCV64: Add 'help -m/M' command support Support RISCV64 arch and common commands - - - --- 2022-08-01 Xianting Tian New
[Crash-utility,V2,6/9] RISCV64: Add 'help -r' command support Support RISCV64 arch and common commands - - - --- 2022-08-01 Xianting Tian New
[Crash-utility,V2,5/9] RISCV64: Add 'bt' command support Support RISCV64 arch and common commands - - - --- 2022-08-01 Xianting Tian New
[Crash-utility,V2,4/9] RISCV64: Add 'irq' command support Support RISCV64 arch and common commands - - - --- 2022-08-01 Xianting Tian New
[Crash-utility,V2,3/9] RISCV64: Add 'dis' command support Support RISCV64 arch and common commands - - - --- 2022-08-01 Xianting Tian New
[Crash-utility,V2,2/9] RISCV64: Make crash tool enter command line and support some commands Support RISCV64 arch and common commands - - 1 --- 2022-08-01 Xianting Tian New
[Crash-utility,V2,1/9] Add RISCV64 framework code support Support RISCV64 arch and common commands - - - --- 2022-08-01 Xianting Tian New
selftests/seccomp: Check CAP_SYS_ADMIN capability in the test mode_filter_without_nnp selftests/seccomp: Check CAP_SYS_ADMIN capability in the test mode_filter_without_nnp - - - --- 2022-07-31 Gautam Menghani New
[GIT,PULL] A Single RISC-V Fix for 5.19 [GIT,PULL] A Single RISC-V Fix for 5.19 - - - --- 2022-07-29 Palmer Dabbelt New
[GIT,PULL] KVM/riscv changes for 5.20 [GIT,PULL] KVM/riscv changes for 5.20 - - - --- 2022-07-29 Anup Patel New
riscv: enable software resend of irqs riscv: enable software resend of irqs - - - --- 2022-07-29 Conor Dooley New
doc: RISC-V: Document that misaligned accesses are supported doc: RISC-V: Document that misaligned accesses are supported - - - --- 2022-07-28 Palmer Dabbelt New
[v4,05/17] dt-bindings: PCI: dwc: Stop selecting generic bindings by default Untitled series #663760 - - - --- 2022-07-28 Serge Semin New
[v2,2/2] clocksource: timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT property Improve CLOCK_EVT_FEAT_C3STOP feature setting - - - --- 2022-07-27 Anup Patel New
[v2,1/2] dt-bindings: riscv: Add optional DT property riscv,timer-can-wake-cpu Improve CLOCK_EVT_FEAT_C3STOP feature setting - - - --- 2022-07-27 Anup Patel New
[v2] RISC-V: Add mvendorid, marchid, and mimpid to /proc/cpuinfo output [v2] RISC-V: Add mvendorid, marchid, and mimpid to /proc/cpuinfo output - 2 1 --- 2022-07-27 Anup Patel New
[6/6] riscv: dts: renesas: Add initial devicetree for Renesas RZ/Five SoC Add support for Renesas RZ/Five SoC - - - --- 2022-07-26 Lad Prabhakar New
[5/6] RISC-V: Kconfig.socs: Add Renesas RZ/Five SoC kconfig option Add support for Renesas RZ/Five SoC - - - --- 2022-07-26 Lad Prabhakar New
[4/6] dt-bindings: riscv: Add DT binding documentation for Renesas RZ/Five SoC and SMARC EVK Add support for Renesas RZ/Five SoC - - - --- 2022-07-26 Lad Prabhakar New
[3/6] dt-bindings: riscv: Add Andes AX45MP core to the list Add support for Renesas RZ/Five SoC 1 - - --- 2022-07-26 Lad Prabhakar New
[2/6] dt-bindings: riscv: Sort the CPU core list alphabetically Add support for Renesas RZ/Five SoC - 1 - --- 2022-07-26 Lad Prabhakar New
[1/6] dt-bindings: arm: renesas: Ignore the schema for RISC-V arch Add support for Renesas RZ/Five SoC - - - --- 2022-07-26 Lad Prabhakar New
[v3,2/2] dt-bindings: sifive: add gpio-line-names Fix SiFive dt-schema errors 1 - - --- 2022-07-26 Conor Dooley New
[v3,1/2] dt-bindings: sifive: add cache-set value of 2048 Fix SiFive dt-schema errors - - - --- 2022-07-26 Conor Dooley New
[V4,5/5] riscv: crash_core: Export kernel vm layout, phys_ram_base RISC-V fixups to work with crash tool - - - --- 2022-07-26 Xianting Tian New
[V4,4/5] RISC-V: Fixup getting correct current pc RISC-V fixups to work with crash tool - - - --- 2022-07-26 Xianting Tian New
[V4,3/5] riscv: Add modules to virtual kernel memory layout dump RISC-V fixups to work with crash tool - 2 - --- 2022-07-26 Xianting Tian New
[V4,2/5] RISC-V: Add arch_crash_save_vmcoreinfo support RISC-V fixups to work with crash tool - - - --- 2022-07-26 Xianting Tian New
[V4,1/5] RISC-V: use __smp_processor_id() instead of smp_processor_id() RISC-V fixups to work with crash tool - 3 - --- 2022-07-26 Xianting Tian New
[v2,2/2] riscv/purgatory: Omit use of bin2c [v2,1/2] riscv/purgatory: hard-code obj-y in Makefile 1 - - --- 2022-07-25 Masahiro Yamada New
[v2,1/2] riscv/purgatory: hard-code obj-y in Makefile [v2,1/2] riscv/purgatory: hard-code obj-y in Makefile - 1 - --- 2022-07-25 Masahiro Yamada New
[RESEND,V2,5/5] riscv: crash_core: Export kernel vm layout, phys_ram_base Fixups to work with crash tool - - - --- 2022-07-25 Xianting Tian New
[RESEND,V2,4/5] RISC-V: Fixup getting correct current pc Fixups to work with crash tool - - - --- 2022-07-25 Xianting Tian New
[RESEND,V2,3/5] riscv: Add modules to virtual kernel memory layout dump Fixups to work with crash tool - 2 - --- 2022-07-25 Xianting Tian New
[RESEND,V2,2/5] RISC-V: Add arch_crash_save_vmcoreinfo support Fixups to work with crash tool - - - --- 2022-07-25 Xianting Tian New
[RESEND,V2,1/5] RISC-V: use __smp_processor_id() instead of smp_processor_id() Fixups to work with crash tool - 3 - --- 2022-07-25 Xianting Tian New
[V2,5/5] riscv64: crash_core: Export kernel vm layout, phys_ram_base Fixups to work with crash tool - - - --- 2022-07-24 Xianting Tian New
[V2,4/5] RISC-V: Fixup getting correct current pc Fixups to work with crash tool - - - --- 2022-07-24 Xianting Tian New
[V2,3/5] riscv: Add modules to virtual kernel memory layout dump Fixups to work with crash tool - 2 - --- 2022-07-24 Xianting Tian New
[V2,2/5] RISC-V: Add arch_crash_save_vmcoreinfo support Fixups to work with crash tool - - - --- 2022-07-24 Xianting Tian New
[V2,1/5] RISC-V: use __smp_processor_id() instead of smp_processor_id() Fixups to work with crash tool - 3 - --- 2022-07-24 Xianting Tian New
[V8,10/10] csky: Add qspinlock support arch: Add qspinlock support with combo style - - - --- 2022-07-24 Guo Ren New
[V8,09/10] csky: Enable ARCH_INLINE_READ*/WRITE*/SPIN* arch: Add qspinlock support with combo style - - - --- 2022-07-24 Guo Ren New
[V8,08/10] riscv: Add combo spinlock support arch: Add qspinlock support with combo style - - - --- 2022-07-24 Guo Ren New
[V8,07/10] riscv: Add qspinlock support arch: Add qspinlock support with combo style - - - --- 2022-07-24 Guo Ren New
[V8,06/10] riscv: atomic: Clean up unnecessary acquire and release definitions arch: Add qspinlock support with combo style - - - --- 2022-07-24 Guo Ren New
[V8,05/10] riscv: Enable ARCH_INLINE_READ*/WRITE*/SPIN* arch: Add qspinlock support with combo style - - - --- 2022-07-24 Guo Ren New
[V8,04/10] asm-generic: spinlock: Add queued spinlock support in common header arch: Add qspinlock support with combo style - - - --- 2022-07-24 Guo Ren New
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