Show patches with: State = Action Required       |   8814 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[v4,4/5] irqchip: sifive-plic: Differentiate between PLIC handler and context IRQ affinity support in PLIC driver - - - --- 2018-12-27 Anup Patel New
[v4,3/5] irqchip: sifive-plic: Add warning in plic_init() if handler already present IRQ affinity support in PLIC driver - 1 - --- 2018-12-27 Anup Patel New
[v4,2/5] irqchip: sifive-plic: Don't inline plic_toggle() and plic_irq_toggle() IRQ affinity support in PLIC driver - - - --- 2018-12-27 Anup Patel New
[v4,1/5] irqchip: sifive-plic: Pre-compute context hart base and enable base IRQ affinity support in PLIC driver - - - --- 2018-12-27 Anup Patel New
[3/3] RISC-V: Fix non-smp kernel boot on SMP systems Non-smp configuration fix - - - --- 2018-12-26 Atish Patra New
[2/3] RISC-V: Move cpuid to hartid mapping to SMP. Non-smp configuration fix - 1 - --- 2018-12-26 Atish Patra New
[1/3] RISC-V: Do not wait indefinitely in __cpu_up Non-smp configuration fix - 1 - --- 2018-12-26 Atish Patra New
tools uapi: fix RISC-V 64-bit support tools uapi: fix RISC-V 64-bit support - 1 - --- 2018-12-25 Aurelien Jarno New
[v2] RISC-V: defconfig: Enable Generic PCIE by default [v2] RISC-V: defconfig: Enable Generic PCIE by default - - - --- 2018-12-21 Alistair Francis New
RISC-V: defconfig: Enable Generic PCIE by default RISC-V: defconfig: Enable Generic PCIE by default - - - --- 2018-12-21 Alistair Francis New
[GIT,PULL] RISC-V Updates for the 4.21 Merge Window, Part 1 [GIT,PULL] RISC-V Updates for the 4.21 Merge Window, Part 1 - - - --- 2018-12-21 Palmer Dabbelt New
[v2] RISC-V: Make BSS section as the last section in vmlinux.lds.S [v2] RISC-V: Make BSS section as the last section in vmlinux.lds.S - 1 - --- 2018-12-19 Anup Patel New
[20/25] clocksource/drivers/riscv: Change name riscv_timer to timer-riscv Untitled series #58531 - 1 - --- 2018-12-18 Daniel Lezcano New
[19/25] clocksource/drivers/riscv_timer: Provide the sched_clock Untitled series #58531 - 1 - --- 2018-12-18 Daniel Lezcano New
arch: riscv: support kernel command line forcing when no DTB passed arch: riscv: support kernel command line forcing when no DTB passed - 1 - --- 2018-12-18 Paul Walmsley New
[2/2] MAINTAINERS: SiFive drivers: add myself as a SiFive driver maintainer [1/2] MAINTAINERS: SiFive drivers: change the git tree to a SiFive git tree - - - --- 2018-12-18 Paul Walmsley New
[1/2] MAINTAINERS: SiFive drivers: change the git tree to a SiFive git tree [1/2] MAINTAINERS: SiFive drivers: change the git tree to a SiFive git tree - - - --- 2018-12-18 Paul Walmsley New
[v3] riscv: don't stop itself in smp_send_stop [v3] riscv: don't stop itself in smp_send_stop - - - --- 2018-12-17 Andreas Schwab New
riscv: Add pte bit to distinguish swap from invalid riscv: Add pte bit to distinguish swap from invalid - 1 - --- 2018-12-16 Stefan O'Rear New
riscv: remove redundant kernel-space generic-y riscv: remove redundant kernel-space generic-y 1 - - --- 2018-12-16 Masahiro Yamada New
[7/7] riscv: dts: add initial board data for the SiFive HiFive Unleashed arch: riscv: add DT file support, starting with the SiFive HiFive-U - - - --- 2018-12-15 Paul Walmsley New
[6/7] dt-binding: riscv: sifive: add documentation for FU540-based boards arch: riscv: add DT file support, starting with the SiFive HiFive-U - 1 - --- 2018-12-15 Paul Walmsley New
[5/7] riscv: dts: add initial support for the SiFive FU540-C000 SoC arch: riscv: add DT file support, starting with the SiFive HiFive-U - - - --- 2018-12-15 Paul Walmsley New
[4/7] dt-bindings: riscv: cpus: add U54 cores to the list of documented CPUs arch: riscv: add DT file support, starting with the SiFive HiFive-U - - - --- 2018-12-15 Paul Walmsley New
[3/7] dt-bindings: riscv: cpus: add E51 cores to the list of documented CPUs arch: riscv: add DT file support, starting with the SiFive HiFive-U - - - --- 2018-12-15 Paul Walmsley New
[2/7] dt-bindings: riscv: sifive: add documentation for the SiFive FU540 arch: riscv: add DT file support, starting with the SiFive HiFive-U - 1 - --- 2018-12-15 Paul Walmsley New
[1/7] arch: riscv: add support for building DTB files from DT source data arch: riscv: add DT file support, starting with the SiFive HiFive-U - - - --- 2018-12-15 Paul Walmsley New
[v1,9/9] mm: better document PG_reserved mm: PG_reserved cleanups and documentation - - - --- 2018-12-14 David Hildenbrand New
[v1,8/9] ia64: perfmon: Don't mark buffer pages as PG_reserved mm: PG_reserved cleanups and documentation - - - --- 2018-12-14 David Hildenbrand New
[v1,7/9] arm64: kdump: No need to mark crashkernel pages manually PG_reserved mm: PG_reserved cleanups and documentation - - - --- 2018-12-14 David Hildenbrand New
[v1,6/9] arm64: kexec: no need to ClearPageReserved() mm: PG_reserved cleanups and documentation 1 1 - --- 2018-12-14 David Hildenbrand New
[v1,5/9] m68k/mm: use __ClearPageReserved() mm: PG_reserved cleanups and documentation - - - --- 2018-12-14 David Hildenbrand New
[v1,4/9] riscv/vdso: don't clear PG_reserved mm: PG_reserved cleanups and documentation 1 - - --- 2018-12-14 David Hildenbrand New
[v1,3/9] powerpc/vdso: don't clear PG_reserved mm: PG_reserved cleanups and documentation 1 - - --- 2018-12-14 David Hildenbrand New
[v1,2/9] s390/vdso: don't clear PG_reserved mm: PG_reserved cleanups and documentation - - - --- 2018-12-14 David Hildenbrand New
[v1,1/9] agp: efficeon: no need to set PG_reserved on GATT tables mm: PG_reserved cleanups and documentation - - - --- 2018-12-14 David Hildenbrand New
[RFC,v2,2/2] pwm: sifive: Add a driver for SiFive SoC PWM PWM support for HiFive Unleashed - - - --- 2018-12-14 Yash Shah New
[RFC,v2,1/2] pwm: sifive: Add DT documentation for SiFive PWM Controller PWM support for HiFive Unleashed - - - --- 2018-12-14 Yash Shah New
[v2,4/4] RISC-V: Fix non-smp kernel boot on SMP systems Timer code cleanup. - - - --- 2018-12-13 Atish Patra New
[v2,3/4] RISC-V: Remove per cpu clocksource Timer code cleanup. - 1 - --- 2018-12-13 Atish Patra New
[v2,2/4] RISC-V: Support per-hart timebase-frequency Timer code cleanup. - - - --- 2018-12-13 Atish Patra New
[v2,1/4] dt-bindings: Correct RISC-V's timebase-frequency Timer code cleanup. - 1 - --- 2018-12-13 Atish Patra New
[v6,24/27] syscall_get_arch: add "struct task_struct *" argument ptrace: add PTRACE_GET_SYSCALL_INFO request 4 2 - --- 2018-12-13 Dmitry V. Levin New
[v6,19/27] riscv: define syscall_get_arch() ptrace: add PTRACE_GET_SYSCALL_INFO request - 1 - --- 2018-12-13 Dmitry V. Levin New
[v2] riscv: don't stop itself in smp_send_stop [v2] riscv: don't stop itself in smp_send_stop - 1 - --- 2018-12-11 Andreas Schwab New
riscv: restore asm/syscalls.h UAPI header riscv: restore asm/syscalls.h UAPI header - - - --- 2018-12-11 David Abdurachmanov New
BUG: FP registers leak across execve BUG: FP registers leak across execve - - - --- 2018-12-10 Aurelien Jarno New
[2/2] riscv: define CREATE_TRACE_POINTS in ptrace.c Fix next-audit branch - - - --- 2018-12-10 David Abdurachmanov New
[1/2] riscv: define NR_syscalls in unistd.h Fix next-audit branch - 1 - --- 2018-12-10 David Abdurachmanov New
[1/5] clocksource/drivers/riscv: Change name riscv_timer to timer-riscv [1/5] clocksource/drivers/riscv: Change name riscv_timer to timer-riscv - 1 - --- 2018-12-10 Daniel Lezcano New
[3/3] riscv: Adjust mmap base address at a third of task size Hugetlbfs support for riscv - 1 - --- 2018-12-10 Alexandre Ghiti New
[2/3] riscv: Fix wrong comment about task size for riscv64 Hugetlbfs support for riscv - 1 - --- 2018-12-10 Alexandre Ghiti New
[1/3] riscv: Introduce huge page support for 32/64bit kernel Hugetlbfs support for riscv - - - --- 2018-12-10 Alexandre Ghiti New
[v5,22/25] syscall_get_arch: add "struct task_struct *" argument ptrace: add PTRACE_GET_SYSCALL_INFO request 2 2 - --- 2018-12-10 Dmitry V. Levin New
[v5,17/25] riscv: define syscall_get_arch() ptrace: add PTRACE_GET_SYSCALL_INFO request - 1 - --- 2018-12-10 Dmitry V. Levin New
RISC-V: Support MODULE_SECTIONS mechanism on RV32 RISC-V: Support MODULE_SECTIONS mechanism on RV32 - - - --- 2018-12-07 Zong Li New
[2/2] riscv: add HAVE_SYSCALL_TRACEPOINTS to Kconfig riscv: enable syscalls tracepoints - - - --- 2018-12-06 David Abdurachmanov New
[1/2] riscv: fix trace_sys_exit hook riscv: enable syscalls tracepoints - - - --- 2018-12-06 David Abdurachmanov New
[2/2] riscv: fix syscall_{get,set}_arguments riscv: add support for SECCOMP and SECCOMP_FILTER - - - --- 2018-12-06 David Abdurachmanov New
[1/2] riscv: add support for SECCOMP incl. filters riscv: add support for SECCOMP and SECCOMP_FILTER - - - --- 2018-12-06 David Abdurachmanov New
riscv: remove unused variable in ftrace riscv: remove unused variable in ftrace 1 1 - --- 2018-12-06 David Abdurachmanov New
[RFC,7/7] mm: better document PG_reserved mm: PG_reserved cleanups and documentation - - - --- 2018-12-05 David Hildenbrand New
[RFC,6/7] arm64: kexec: no need to ClearPageReserved() mm: PG_reserved cleanups and documentation 1 - - --- 2018-12-05 David Hildenbrand New
[RFC,5/7] m68k/mm: use __ClearPageReserved() mm: PG_reserved cleanups and documentation - - - --- 2018-12-05 David Hildenbrand New
[RFC,4/7] riscv/vdso: don't clear PG_reserved mm: PG_reserved cleanups and documentation 1 - - --- 2018-12-05 David Hildenbrand New
[RFC,3/7] powerpc/vdso: don't clear PG_reserved mm: PG_reserved cleanups and documentation - - - --- 2018-12-05 David Hildenbrand New
[RFC,2/7] s390/vdso: don't clear PG_reserved mm: PG_reserved cleanups and documentation - - - --- 2018-12-05 David Hildenbrand New
[RFC,1/7] agp: efficeon: no need to set PG_reserved on GATT tables mm: PG_reserved cleanups and documentation - - - --- 2018-12-05 David Hildenbrand New
[3/3] arch: remove redundant generic-y defines Untitled series #52041 1 - - --- 2018-12-05 Masahiro Yamada New
[3/3] RISC-V: Remove EARLY_PRINTK support RISC-V SBI earlycon - 1 - --- 2018-12-04 Anup Patel New
[2/3] RISC-V: defconfig: Enable RISC-V SBI earlycon support RISC-V SBI earlycon - 1 - --- 2018-12-04 Anup Patel New
[1/3] tty/serial: Add RISC-V SBI earlycon support RISC-V SBI earlycon 1 1 - --- 2018-12-04 Anup Patel New
[v2,2/2] clocksource: riscv_timer: Provide sched_clock Provide sched_clock for riscv_timer - 1 - --- 2018-12-04 Anup Patel New
[v2,1/2] RISC-V: Select GENERIC_SCHED_CLOCK for clocksource drivers Provide sched_clock for riscv_timer - 1 - --- 2018-12-04 Anup Patel New
[4/4] RISC-V: Fix non-smp kernel boot on SMP systems Timer code cleanup. - - - --- 2018-12-03 Atish Patra New
[3/4] RISC-V: Remove per cpu clocksource Timer code cleanup. - 1 - --- 2018-12-03 Atish Patra New
[2/4] RISC-V: Support per-hart timebase-frequency Timer code cleanup. - - - --- 2018-12-03 Atish Patra New
[1/4] dt-bindings: Correct RISC-V's timebase-frequency Timer code cleanup. - 1 - --- 2018-12-03 Atish Patra New
clocksource: riscv_timer: Provide sched_clock clocksource: riscv_timer: Provide sched_clock - - - --- 2018-12-03 Anup Patel New
riscv, atomic: Add #define's for the atomic_{cmp, }xchg_*() variants riscv, atomic: Add #define's for the atomic_{cmp, }xchg_*() variants 1 - - --- 2018-12-01 Andrea Parri New
[v3,6/6] irqchip: sifive-plic: Implement irq_set_affinity() for SMP host IRQ affinity support in PLIC driver - - - --- 2018-11-30 Anup Patel New
[v3,5/6] irqchip: sifive-plic: Differentiate between PLIC handler and context IRQ affinity support in PLIC driver - - - --- 2018-11-30 Anup Patel New
[v3,4/6] irqchip: sifive-plic: Add warning in plic_init() if handler already present IRQ affinity support in PLIC driver - 1 - --- 2018-11-30 Anup Patel New
[v3,3/6] irqchip: sifive-plic: More flexible plic_irq_toggle() IRQ affinity support in PLIC driver - - - --- 2018-11-30 Anup Patel New
[v3,2/6] irqchip: sifive-plic: Add struct plic_hw for global PLIC HW details IRQ affinity support in PLIC driver - - - --- 2018-11-30 Anup Patel New
[v3,1/6] irqchip: sifive-plic: Pre-compute context hart base and enable base IRQ affinity support in PLIC driver - - - --- 2018-11-30 Anup Patel New
[RFT,v1,4/4] RISC-V: Parse cpu topology during boot. Unify CPU topology across ARM64 & RISC-V 1 - - --- 2018-11-29 Atish Patra New
[RFT,v1,3/4] cpu-topology: Move cpu topology code to common code. Unify CPU topology across ARM64 & RISC-V - - - --- 2018-11-29 Atish Patra New
[RFT,v1,2/4] dt-binding: cpu-topology: Move cpu-map to a common binding. Unify CPU topology across ARM64 & RISC-V - 1 - --- 2018-11-29 Atish Patra New
[RFT,v1,1/4] Documentation: DT: arm: add support for sockets defining package boundaries Unify CPU topology across ARM64 & RISC-V - 1 - --- 2018-11-29 Atish Patra New
riscv: don't stop itself in smp_send_stop riscv: don't stop itself in smp_send_stop - - - --- 2018-11-29 Andreas Schwab New
[AUTOSEL,4.9,14/18] mtd: rawnand: qcom: Namespace prefix some commands Untitled series #49105 - 1 - --- 2018-11-29 Sasha Levin New
[AUTOSEL,4.14,19/35] mtd: rawnand: qcom: Namespace prefix some commands Untitled series #49125 - 1 - --- 2018-11-29 Sasha Levin New
[AUTOSEL,4.19,50/68] riscv: fix warning in arch/riscv/include/asm/module.h Untitled series #49095 1 - - --- 2018-11-29 Sasha Levin New
[AUTOSEL,4.19,37/68] mtd: rawnand: qcom: Namespace prefix some commands Untitled series #49095 - 1 - --- 2018-11-29 Sasha Levin New
[v2,4/4] irqchip: sifive-plic: Implement irq_set_affinity() for SMP host IRQ affinity support in PLIC driver - - - --- 2018-11-27 Anup Patel New
[v2,3/4] irqchip: sifive-plic: Differentiate between PLIC handler and context IRQ affinity support in PLIC driver - - - --- 2018-11-27 Anup Patel New
[v2,2/4] irqchip: sifive-plic: More flexible plic_irq_toggle() IRQ affinity support in PLIC driver - - - --- 2018-11-27 Anup Patel New
[v2,1/4] irqchip: sifive-plic: Pre-compute context hart base and enable base IRQ affinity support in PLIC driver - - - --- 2018-11-27 Anup Patel New
RISC-V: Make BSS section as the last section in vmlinux.lds.S RISC-V: Make BSS section as the last section in vmlinux.lds.S - 1 1 --- 2018-11-26 Anup Patel New
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