Show patches with: Submitter = Bin Meng       |   17 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v2,2/2] riscv: dts: microchip: Add ethernet0 to the aliases node [v2,1/2] riscv: dts: microchip: Use 'local-mac-address' for emac1 - 1 - --- 2021-08-04 Bin Meng New
[v2,1/2] riscv: dts: microchip: Use 'local-mac-address' for emac1 [v2,1/2] riscv: dts: microchip: Use 'local-mac-address' for emac1 - 1 - --- 2021-08-04 Bin Meng New
[2/2] riscv: dts: microchip: Add ethernet0 to the aliases node [1/2] riscv: dts: microchip: Use 'local-mac-address' for emac1 - 1 - --- 2021-07-02 Bin Meng New
[1/2] riscv: dts: microchip: Use 'local-mac-address' for emac1 [1/2] riscv: dts: microchip: Use 'local-mac-address' for emac1 - 1 - --- 2021-07-02 Bin Meng New
riscv: Fix 32-bit RISC-V boot failure riscv: Fix 32-bit RISC-V boot failure - - - --- 2021-06-27 Bin Meng New
[2/2] riscv: dts: unmatched: Add gpio card detect to mmc-spi-slot [1/2] riscv: dts: unleashed: Add gpio card detect to mmc-spi-slot - - - --- 2021-06-16 Bin Meng New
[1/2] riscv: dts: unleashed: Add gpio card detect to mmc-spi-slot [1/2] riscv: dts: unleashed: Add gpio card detect to mmc-spi-slot - - - --- 2021-06-16 Bin Meng New
riscv: dts: microchip: Define hart clocks riscv: dts: microchip: Define hart clocks - 1 - --- 2021-06-16 Bin Meng New
[2/2] riscv: dts: microchip: Fix wrong interrupt numbers of DMA [1/2] riscv: dts: microchip: Drop "clock-frequency" property of cpu nodes - 1 - --- 2021-06-16 Bin Meng New
[1/2] riscv: dts: microchip: Drop "clock-frequency" property of cpu nodes [1/2] riscv: dts: microchip: Drop "clock-frequency" property of cpu nodes - 1 - --- 2021-06-16 Bin Meng New
riscv: dts: sifive: Add ethernet0 to the aliases node riscv: dts: sifive: Add ethernet0 to the aliases node - 1 - --- 2019-09-05 Bin Meng New
[v2] riscv: dts: sifive: Drop "clock-frequency" property of cpu nodes [v2] riscv: dts: sifive: Drop "clock-frequency" property of cpu nodes - 1 - --- 2019-09-05 Bin Meng New
[v3] riscv: Using CSR numbers to access CSRs [v3] riscv: Using CSR numbers to access CSRs - 2 - --- 2019-08-07 Bin Meng New
[v2] riscv: Using CSR numbers to access CSRs [v2] riscv: Using CSR numbers to access CSRs - 1 - --- 2019-08-07 Bin Meng Superseded
riscv: dts: sifive: Add missing "clock-frequency" to cpu0/cpu1 nodes riscv: dts: sifive: Add missing "clock-frequency" to cpu0/cpu1 nodes - - - --- 2019-08-07 Bin Meng New
riscv: Using CSR numbers to access CSRs riscv: Using CSR numbers to access CSRs - 1 - --- 2019-07-11 Bin Meng Superseded
riscv: dts: fu540-c000: Add "status" property to cpu node riscv: dts: fu540-c000: Add "status" property to cpu node - - - --- 2019-07-05 Bin Meng New