Show patches with: State = Action Required       |    Archived = No       |   203 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
selftest/mm: Do not use hint for riscv mmap selftest/mm: Do not use hint for riscv mmap - - - 13-- 2024-09-12 Chunyan Zhang New
[v10,14/14] riscv: Add ghostwrite vulnerability riscv: Add support for xtheadvector - - - 1111 2024-09-12 Charlie Jenkins New
[v10,13/14] selftests: riscv: Support xtheadvector in vector tests riscv: Add support for xtheadvector - - - 1111 2024-09-12 Charlie Jenkins New
[v10,12/14] selftests: riscv: Fix vector tests riscv: Add support for xtheadvector - - - 1111 2024-09-12 Charlie Jenkins New
[v10,11/14] riscv: hwprobe: Document thead vendor extensions and xtheadvector extension riscv: Add support for xtheadvector - 1 - 12-1 2024-09-12 Charlie Jenkins New
[v10,10/14] riscv: hwprobe: Add thead vendor extension probing riscv: Add support for xtheadvector - 1 - 1111 2024-09-12 Charlie Jenkins New
[v10,09/14] riscv: vector: Support xtheadvector save/restore riscv: Add support for xtheadvector - 2 - 1111 2024-09-12 Charlie Jenkins New
[v10,08/14] riscv: Add xtheadvector instruction definitions riscv: Add support for xtheadvector - - - 12-1 2024-09-12 Charlie Jenkins New
[v10,07/14] riscv: csr: Add CSR encodings for CSR_VXRM/CSR_VXSAT riscv: Add support for xtheadvector - - - 12-1 2024-09-12 Charlie Jenkins New
[v10,06/14] RISC-V: define the elements of the VCSR vector CSR riscv: Add support for xtheadvector 1 2 - 1111 2024-09-12 Charlie Jenkins New
[v10,05/14] riscv: vector: Use vlenb from DT for thead riscv: Add support for xtheadvector 1 - - 1012 2024-09-12 Charlie Jenkins New
[v10,04/14] riscv: Add thead and xtheadvector as a vendor extension riscv: Add support for xtheadvector - 1 - 1111 2024-09-12 Charlie Jenkins New
[v10,03/14] riscv: dts: allwinner: Add xtheadvector to the D1/D1s devicetree riscv: Add support for xtheadvector - 1 - 12-1 2024-09-12 Charlie Jenkins New
[v10,02/14] dt-bindings: cpus: add a thead vlen register length property riscv: Add support for xtheadvector - 2 - 12-1 2024-09-12 Charlie Jenkins New
[v10,01/14] dt-bindings: riscv: Add xtheadvector ISA extension description riscv: Add support for xtheadvector - 2 - 1111 2024-09-12 Charlie Jenkins New
[v3,4/4] arm: defconfig: drop RT_GROUP_SCHED=y from bcm2835/tegra/omap2plus defconfig: drop RT_GROUP_SCHED=y 1 - 1 131- 2024-09-10 Celeste Liu New
[v3,3/4] sh: defconfig: drop RT_GROUP_SCHED=y from sdk7786/urquell defconfig: drop RT_GROUP_SCHED=y - - - 131- 2024-09-10 Celeste Liu New
[v3,2/4] loongarch: defconfig: drop RT_GROUP_SCHED=y defconfig: drop RT_GROUP_SCHED=y - 1 - 131- 2024-09-10 Celeste Liu New
[v3,1/4] riscv: defconfig: drop RT_GROUP_SCHED=y defconfig: drop RT_GROUP_SCHED=y 2 - - 131- 2024-09-10 Celeste Liu New
riscv: Remove duplicated GET_RM riscv: Remove duplicated GET_RM - 1 - 14-- 2024-09-09 Chunyan Zhang New
irqchip/riscv-imsic: Fix output text of base address irqchip/riscv-imsic: Fix output text of base address - 1 - 14-- 2024-09-09 Andrew Jones New
[1/7] tracing: add ftrace_regs to function_graph_enter() add function arguments to ftrace - - - 131- 2024-09-04 Sven Schnelle New
[3/3] riscv: dts: spacemit: add gpio support for K1 SoC riscv: spacemit: add gpio support for K1 SoC - - - --1 2024-09-04 Yixun Lan conchuod New
irqchip/sifive-plic: Fix error codes irqchip/sifive-plic: Fix error codes - 2 - --1 2024-09-03 Charlie Jenkins New
[v2] riscv: Fix race condition with PR_RISCV_CTX_SW_FENCEI_OFF [v2] riscv: Fix race condition with PR_RISCV_CTX_SW_FENCEI_OFF - - - 13-- 2024-09-03 Charlie Jenkins New
[-next] irqchip/sifive-plic: Make use of __assign_bit() API [-next] irqchip/sifive-plic: Make use of __assign_bit() API 1 1 - 121- 2024-09-02 Hongbo Li New
perf syscalltbl: Add syscalltbl__id_at_idx() with no syscall table support perf syscalltbl: Add syscalltbl__id_at_idx() with no syscall table support - - - 121- 2024-08-31 Charlie Jenkins New
riscv: remove useless pc check in stacktrace handling riscv: remove useless pc check in stacktrace handling - 1 - 13-- 2024-08-30 Clément Léger New
[RESEND,V4,3/3] riscv: mm: Add uffd write-protect support riscv: mm: Add soft-dirty and uffd-wp support - - - 121- 2024-08-30 Chunyan Zhang New
[RESEND,V4,2/3] riscv: mm: Add soft-dirty page tracking support riscv: mm: Add soft-dirty and uffd-wp support - - - 121- 2024-08-30 Chunyan Zhang New
[RESEND,V4,1/3] riscv: mm: Prepare for reusing PTE RSW bit(9) riscv: mm: Add soft-dirty and uffd-wp support - - - 13-- 2024-08-30 Chunyan Zhang New
drivers/perf: riscv: Align errno for unsupported perf type in pmu_sbi_event_map drivers/perf: riscv: Align errno for unsupported perf type in pmu_sbi_event_map - - - 13-- 2024-08-29 Pu Lehui New
RISC-V: KVM: Redirect instruction access fault trap to guest RISC-V: KVM: Redirect instruction access fault trap to guest - - - 13-- 2024-08-29 Quan Zhou New
[2/3] riscv: dts: sifive: fu740: Use reset index from header clk: sifive: Fix chip hang when booting linux directly - - - 12-1 2024-08-28 Bo Gan conchuod New
[v2] riscv: Report error when repeatedly recording CPU hardware ID [v2] riscv: Report error when repeatedly recording CPU hardware ID - - - 121- 2024-08-28 Zhe Qiao New
riscv: make ZONE_DMA32 optional riscv: make ZONE_DMA32 optional - 1 - 121- 2024-08-27 Vladimir Kondratiev New
[v3,3/3] Documentation: riscv: correct sv57 kernel behavior RISC-V: mm: do not treat hint addr on mmap as the upper bound to search - - - 13-- 2024-08-27 Yangyu Chen New
[v3,2/3] RISC-V: mm: not use hint addr as upper bound RISC-V: mm: do not treat hint addr on mmap as the upper bound to search - - - 13-- 2024-08-27 Yangyu Chen New
[v2] RISC-V: hwprobe: Use BIT macro to avoid warnings [v2] RISC-V: hwprobe: Use BIT macro to avoid warnings - 1 1 13-- 2024-08-22 Jesse Taube New
[v8,1/5,alt] rust: add generic static_key_false [v8,1/5,alt] rust: add generic static_key_false - 1 - --1 2024-08-22 Alice Ryhl New
[v9,6/6] RISC-V: hwprobe: Document unaligned vector perf key RISC-V: Detect and report speed of unaligned vector accesses - 1 - 13-- 2024-08-20 Jesse Taube New
[v9,5/6] RISC-V: Report vector unaligned access speed hwprobe RISC-V: Detect and report speed of unaligned vector accesses - 1 - 121- 2024-08-20 Jesse Taube New
[v9,4/6] RISC-V: Detect unaligned vector accesses supported RISC-V: Detect and report speed of unaligned vector accesses - 1 - 121- 2024-08-20 Jesse Taube New
[v9,3/6] RISC-V: Replace RISCV_MISALIGNED with RISCV_SCALAR_MISALIGNED RISC-V: Detect and report speed of unaligned vector accesses - 3 - 13-- 2024-08-20 Jesse Taube New
[v9,2/6] RISC-V: Scalar unaligned access emulated on hotplug CPUs RISC-V: Detect and report speed of unaligned vector accesses - 1 - 13-- 2024-08-20 Jesse Taube New
[v9,1/6] RISC-V: Check scalar unaligned access on all CPUs RISC-V: Detect and report speed of unaligned vector accesses - 2 - 13-- 2024-08-20 Jesse Taube New
[v5,13/13] riscv: Add qspinlock support Zacas/Zabha support and qspinlocks - 1 - 11-2 2024-08-18 Alexandre Ghiti New
[v5,12/13] dt-bindings: riscv: Add Ziccrse ISA extension description Zacas/Zabha support and qspinlocks 1 2 - 12-1 2024-08-18 Alexandre Ghiti New
[v5,11/13] riscv: Add ISA extension parsing for Ziccrse Zacas/Zabha support and qspinlocks - 1 - 12-1 2024-08-18 Alexandre Ghiti New
[v5,10/13] asm-generic: ticket-lock: Add separate ticket-lock.h Zacas/Zabha support and qspinlocks 1 2 - 1111 2024-08-18 Alexandre Ghiti New
[v5,09/13] asm-generic: ticket-lock: Reuse arch_spinlock_t of qspinlock Zacas/Zabha support and qspinlocks 1 2 - 1111 2024-08-18 Alexandre Ghiti New
[v5,08/13] riscv: Implement xchg8/16() using Zabha Zacas/Zabha support and qspinlocks - 1 - 12-1 2024-08-18 Alexandre Ghiti New
[v5,07/13] riscv: Implement arch_cmpxchg128() using Zacas Zacas/Zabha support and qspinlocks - 1 - 12-1 2024-08-18 Alexandre Ghiti New
[v5,06/13] riscv: Improve zacas fully-ordered cmpxchg() Zacas/Zabha support and qspinlocks - 1 - 1111 2024-08-18 Alexandre Ghiti New
[v5,05/13] riscv: Implement cmpxchg8/16() using Zabha Zacas/Zabha support and qspinlocks - 1 - 12-1 2024-08-18 Alexandre Ghiti New
[v5,04/13] dt-bindings: riscv: Add Zabha ISA extension description Zacas/Zabha support and qspinlocks 1 2 - 12-1 2024-08-18 Alexandre Ghiti New
[v5,03/13] riscv: Implement cmpxchg32/64() using Zacas Zacas/Zabha support and qspinlocks - 1 - 1111 2024-08-18 Alexandre Ghiti New
[v5,02/13] riscv: Do not fail to build on byte/halfword operations with Zawrs Zacas/Zabha support and qspinlocks - 1 - 12-1 2024-08-18 Alexandre Ghiti New
[v5,01/13] riscv: Move cpufeature.h macros into their own header Zacas/Zabha support and qspinlocks - 1 - 1111 2024-08-18 Alexandre Ghiti New
riscv: Remove unused GENERATING_ASM_OFFSETS riscv: Remove unused GENERATING_ASM_OFFSETS - 1 1 13-- 2024-08-16 Chunyan Zhang New
[RFC,7/7] kasan: sw_tags: Support runtime stack tagging control for RISC-V kasan: RISC-V support for KASAN_SW_TAGS using pointer masking - 1 - 13-- 2024-08-14 Samuel Holland New
[RFC,6/7] riscv: Implement KASAN_SW_TAGS kasan: RISC-V support for KASAN_SW_TAGS using pointer masking - - - 121- 2024-08-14 Samuel Holland New
[RFC,5/7] riscv: Align the sv39 linear map to 16 GiB kasan: RISC-V support for KASAN_SW_TAGS using pointer masking - - - 13-- 2024-08-14 Samuel Holland New
[RFC,4/7] riscv: Do not rely on KASAN to define the memory layout kasan: RISC-V support for KASAN_SW_TAGS using pointer masking - - - 13-- 2024-08-14 Samuel Holland New
[RFC,3/7] kasan: sw_tags: Support tag widths less than 8 bits kasan: RISC-V support for KASAN_SW_TAGS using pointer masking - 1 - 121- 2024-08-14 Samuel Holland New
[RFC,2/7] kasan: sw_tags: Check kasan_flag_enabled at runtime kasan: RISC-V support for KASAN_SW_TAGS using pointer masking - 1 - 13-- 2024-08-14 Samuel Holland New
[RFC,1/7] kasan: sw_tags: Use arithmetic shift for shadow computation kasan: RISC-V support for KASAN_SW_TAGS using pointer masking - - - 13-- 2024-08-14 Samuel Holland New
riscv: add a warning when physical memory address overflows riscv: add a warning when physical memory address overflows - 1 1 --1 2024-08-14 Yunhui Cui New
[v2,2/2] cpuidle: riscv-sbi: Add cpuidle_disabled() check cpuidle: riscv-sbi: Allow cpuidle pd used by other devices - 1 - 13-- 2024-08-14 Nick Hu New
[v2,1/2] cpuidle: riscv-sbi: Move sbi_cpuidle_init to arch_initcall cpuidle: riscv-sbi: Allow cpuidle pd used by other devices - 1 - 13-- 2024-08-14 Nick Hu New
[2/2] dt-bindings: riscv: Add Zicclsm ISA extension description. RISC-V: Add Zicclsm extension support 1 1 - 13-- 2024-08-09 Jesse Taube New
[1/2] RISC-V: Add Zicclsm to cpufeature and hwprobe RISC-V: Add Zicclsm extension support - 3 1 121- 2024-08-09 Jesse Taube New
[1/1] RISC-V: Add parameter to unaligned access speed [1/1] RISC-V: Add parameter to unaligned access speed - - - --1 2024-08-05 Jesse Taube New
[RFC] riscv: mm: Add support for uffd write-protect support [RFC] riscv: mm: Add support for uffd write-protect support - - - --1 2024-07-30 Jinjie Ruan New
[v8,5/5] KVM: riscv: selftests: Add Svade and Svadu Extension to get-reg-list test Add Svade and Svadu Extensions Support - 1 - --1 2024-07-26 Yong-Xuan Wang New
[v8,3/5] RISC-V: KVM: Add Svade and Svadu Extensions Support for Guest/VM Add Svade and Svadu Extensions Support - 2 - --1 2024-07-26 Yong-Xuan Wang New
[v8,2/5] dt-bindings: riscv: Add Svade and Svadu Entries Add Svade and Svadu Extensions Support 1 2 - --1 2024-07-26 Yong-Xuan Wang New
[v8,1/5] RISC-V: Add Svade and Svadu Extensions Support Add Svade and Svadu Extensions Support - 2 - --1 2024-07-26 Yong-Xuan Wang New
[v2] riscv: mm: add paging_check() before paging_init() [v2] riscv: mm: add paging_check() before paging_init() - - - 11-3 2024-07-25 Yunhui Cui New
[v3] riscv/mm/fault: add show_pte() before die() [v3] riscv/mm/fault: add show_pte() before die() - 2 - 121- 2024-07-23 Yunhui Cui New
[v2,7/7] riscv: traps: mark do_irq() as __always_inline riscv: convert bottom half of exception handling to C - - - 11-3 2024-07-20 Jisheng Zhang New
[v2,6/7] riscv: staticalize and remove asmlinkage from updated functions riscv: convert bottom half of exception handling to C - - - 11-3 2024-07-20 Jisheng Zhang New
[v2,5/7] riscv: errata: sifive: remove NOMMU handling riscv: convert bottom half of exception handling to C - - - 12-2 2024-07-20 Jisheng Zhang New
[v2,4/7] riscv: errata: remove ALT_INSN_FAULT and ALT_PAGE_FAULT riscv: convert bottom half of exception handling to C - - - 12-2 2024-07-20 Jisheng Zhang New
[v2,3/7] riscv: convert bottom half of exception handling to C riscv: convert bottom half of exception handling to C - - - 1112 2024-07-20 Jisheng Zhang New
[v2,2/7] riscv: traps: remove __visible annotation riscv: convert bottom half of exception handling to C - - - 12-2 2024-07-20 Jisheng Zhang New
[v2,1/7] riscv: traps: staticalize handle_break() riscv: convert bottom half of exception handling to C - - - 12-2 2024-07-20 Jisheng Zhang New
[v2,2/2] riscv: Check that vdso does not contain any dynamic relocations Prevent dynamic relocations in vDSO - 1 - 10-3 2024-07-05 Alexandre Ghiti New
[v2,1/2] riscv: vdso: Prevent gcc from inserting calls to memset() Prevent dynamic relocations in vDSO - 1 - 10-3 2024-07-05 Alexandre Ghiti New
[v8] riscv: mm: Add support for Svinval extension [v8] riscv: mm: Add support for Svinval extension - 2 - 121- 2024-07-02 Mayuresh Chitale New
riscv: signal: abstract header saving for setup_sigcontext riscv: signal: abstract header saving for setup_sigcontext - - - 121- 2024-06-28 Andy Chiu New
riscv: vector: treat VS_INITIAL as discard riscv: vector: treat VS_INITIAL as discard - - - 13-- 2024-06-28 Andy Chiu New
[v1,2/2] riscv: selftests: Add a ptrace test to verify syscall parameter modification riscv: Expose orig_a0 to userspace for ptrace to set the actual a0 - 1 - 11-2 2024-06-27 Quan Zhou New
[v1,1/2] riscv: Expose orig_a0 in the user_regs_struct structure riscv: Expose orig_a0 to userspace for ptrace to set the actual a0 - 1 - 12-1 2024-06-27 Quan Zhou New
[v2] RISC-V: cmdline: Add support for 'memmap' parameter [v2] RISC-V: cmdline: Add support for 'memmap' parameter - 1 - 13-- 2024-06-24 Yunhui Cui New
[5/5] KVM: riscv: selftests: Add Zaamo/Zalrsc extensions to get-reg-list test riscv: add support for Zaamo and Zalrsc extensions - - - 12-2 2024-06-19 Clément Léger New
[4/5] RISC-V: KVM: Allow Zaamo/Zalrsc extensions for Guest/VM riscv: add support for Zaamo and Zalrsc extensions - - - 12-2 2024-06-19 Clément Léger New
[3/5] riscv: hwprobe: export Zaamo and Zalrsc extensions riscv: add support for Zaamo and Zalrsc extensions - 1 - 1112 2024-06-19 Clément Léger New
[2/5] riscv: add parsing for Zaamo and Zalrsc extensions riscv: add support for Zaamo and Zalrsc extensions 1 - - 12-2 2024-06-19 Clément Léger New
[1/5] dt-bindings: riscv: add Zaamo and Zalrsc ISA extension description riscv: add support for Zaamo and Zalrsc extensions 1 - - 12-2 2024-06-19 Clément Léger New
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