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Patch Series A/R/T S/W/F Date Submitter Delegate State
[v6,3/3] RISC-V: Access CSRs using CSR numbers Allow accessing CSR using CSR number - 1 - --- 2019-04-25 Anup Patel New
[v6,2/3] RISC-V: Add interrupt related SCAUSE defines in asm/csr.h Allow accessing CSR using CSR number - 1 - --- 2019-04-25 Anup Patel New
[v6,1/3] RISC-V: Use tabs to align macro values in asm/csr.h Allow accessing CSR using CSR number - 1 - --- 2019-04-25 Anup Patel New
[v5,3/3] RISC-V: Access CSRs using CSR numbers Allow accessing CSR using CSR number - 1 - --- 2019-04-25 Anup Patel New
[v5,2/3] RISC-V: Add interrupt related SCAUSE defines in asm/csr.h Allow accessing CSR using CSR number - - - --- 2019-04-25 Anup Patel New
[v5,1/3] RISC-V: Use tabs to align macro values in asm/csr.h Allow accessing CSR using CSR number - 1 - --- 2019-04-25 Anup Patel New
[2/2] RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs L2 cache controller support for SiFive FU540 - - - --- 2019-04-25 Yash Shah New
[1/2] RISC-V: Add DT documentation for SiFive L2 Cache Controller L2 cache controller support for SiFive FU540 - - - --- 2019-04-25 Yash Shah New
[v4,3/3] RISC-V: Access CSRs using CSR numbers Allow accessing CSR using CSR number - 1 - --- 2019-04-25 Anup Patel New
[v4,2/3] RISC-V: Add interrupt related SCAUSE defines in asm/csr.h Allow accessing CSR using CSR number - - - --- 2019-04-25 Anup Patel New
[v4,1/3] RISC-V: Use tabs to align macro values in asm/csr.h Allow accessing CSR using CSR number - 1 - --- 2019-04-25 Anup Patel New
[4/4] RISC-V: Fix minor checkpatch issues. Miscellaneous kernel command line fixes - 1 - --- 2019-04-24 Atish Patra New
[3/4] RISC-V: Support nr_cpus command line option. Miscellaneous kernel command line fixes - 2 - --- 2019-04-24 Atish Patra New
[2/4] RISC-V: Implement nosmp commandline option. Miscellaneous kernel command line fixes - 2 - --- 2019-04-24 Atish Patra New
[1/4] RISC-V: Add RISC-V specific arch_match_cpu_phys_id Miscellaneous kernel command line fixes - 2 - --- 2019-04-24 Atish Patra New
RISC-V: redefine PTRS_PER_PGD/PTRS_PER_PMD/PTRS_PER_PTE RISC-V: redefine PTRS_PER_PGD/PTRS_PER_PMD/PTRS_PER_PTE - 1 - --- 2019-04-24 sh liu New
RISC-V: redefine PTRS_PER_PGD/PTRS_PER_PMD/PTRS_PER_PTE RISC-V: redefine PTRS_PER_PGD/PTRS_PER_PMD/PTRS_PER_PTE - 1 - --- 2019-04-24 sh liu New
[v3,3/3] RISC-V: Support nr_cpus command line option. Miscellaneous kernel command line fixes - 1 - --- 2019-04-24 Atish Patra New
[v3,2/3] RISC-V: Implement nosmp commandline option. Miscellaneous kernel command line fixes - 1 - --- 2019-04-24 Atish Patra New
[v3,1/3] RISC-V: Add RISC-V specific arch_match_cpu_phys_id Miscellaneous kernel command line fixes - 2 - --- 2019-04-24 Atish Patra New
RISC-V: Add an Image header that boot loader can parse. RISC-V: Add an Image header that boot loader can parse. - - - --- 2019-04-23 Atish Patra New
riscv: vdso: drop unnecessary cc-ldoption riscv: vdso: drop unnecessary cc-ldoption - 1 - --- 2019-04-23 Nick Desaulniers New
riscv: Support non-coherency memory model riscv: Support non-coherency memory model - - - --- 2019-04-22 Guo Ren New
[v2,29/79] docs: riscv: convert docs to ReST and rename to *.rst Convert files to ReST - - - --- 2019-04-22 Mauro Carvalho Chehab New
[v2,18/79] docs: kbuild: convert docs to ReST and rename to *.rst Convert files to ReST - - - --- 2019-04-22 Mauro Carvalho Chehab New
RISC-V: redefine PTRS_PER_PGD/PTRS_PER_PMD/PTRS_PER_PTE RISC-V: redefine PTRS_PER_PGD/PTRS_PER_PMD/PTRS_PER_PTE - - - --- 2019-04-18 sh liu New
[v5,3/3] dt-bindings: arm: fsl: Add the imx8mq boards Add support for the Purism Librem5 devkit - 1 - --- 2019-04-17 Angus Ainslie New
[v5,2/3] dt-bindings: Add an entry for Purism SPC Add support for the Purism Librem5 devkit - 1 - --- 2019-04-17 Angus Ainslie New
[v5,1/3] arm64: dts: fsl: librem5: Add a device tree for the Librem5 devkit Add support for the Purism Librem5 devkit - - - --- 2019-04-17 Angus Ainslie New
[v3,11/11] riscv: Make mmap allocation top-down by default Provide generic top-down mmap layout functions - 3 - --- 2019-04-17 Alexandre Ghiti New
[v3,10/11] mips: Use generic mmap top-down layout Provide generic top-down mmap layout functions 1 - - --- 2019-04-17 Alexandre Ghiti New
[v3,09/11] mips: Use STACK_TOP when computing mmap base address Provide generic top-down mmap layout functions 1 - - --- 2019-04-17 Alexandre Ghiti New
[v3,08/11] mips: Properly account for stack randomization and stack guard gap Provide generic top-down mmap layout functions 1 - - --- 2019-04-17 Alexandre Ghiti New
[v3,07/11] arm: Use generic mmap top-down layout Provide generic top-down mmap layout functions 1 - - --- 2019-04-17 Alexandre Ghiti New
[v3,06/11] arm: Use STACK_TOP when computing mmap base address Provide generic top-down mmap layout functions 1 - - --- 2019-04-17 Alexandre Ghiti New
[v3,05/11] arm: Properly account for stack randomization and stack guard gap Provide generic top-down mmap layout functions 1 - - --- 2019-04-17 Alexandre Ghiti New
[v3,04/11] arm64, mm: Move generic mmap layout functions to mm Provide generic top-down mmap layout functions - 1 - --- 2019-04-17 Alexandre Ghiti New
[v3,03/11] arm64: Consider stack randomization for mmap base only when necessary Provide generic top-down mmap layout functions 1 1 - --- 2019-04-17 Alexandre Ghiti New
[v3,02/11] arm64: Make use of is_compat_task instead of hardcoding this test Provide generic top-down mmap layout functions 1 1 - --- 2019-04-17 Alexandre Ghiti New
[v3,01/11] mm, fs: Move randomize_stack_top from fs to mm Provide generic top-down mmap layout functions 1 1 - --- 2019-04-17 Alexandre Ghiti New
[GIT,PULL] RISC-V Patches for 5.1-rc6 [GIT,PULL] RISC-V Patches for 5.1-rc6 - - - --- 2019-04-16 Palmer Dabbelt New
RISC-V: Add kexec support RISC-V: Add kexec support - - - --- 2019-04-16 Nick Kossifidis New
RISC-V: Add support for kexec on kexec-tools RISC-V: Add support for kexec on kexec-tools - - - --- 2019-04-16 Nick Kossifidis New
[29/57] docs: riscv: convert it to ReST format Convert files to ReST - - - --- 2019-04-16 Mauro Carvalho Chehab New
[5.0,077/117] riscv: Fix syscall_get_arguments() and syscall_set_arguments() Untitled series #106007 1 - - --- 2019-04-15 Greg Kroah-Hartman New
[4.19,070/101] riscv: Fix syscall_get_arguments() and syscall_set_arguments() Untitled series #106003 1 - - --- 2019-04-15 Greg Kroah-Hartman New
[3/3] edac: sifive: Add EDAC platform driver for SiFive SoCs L2 cache controller and EDAC support for SiFive SoCs - - - --- 2019-04-15 Yash Shah New
[2/3] RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs L2 cache controller and EDAC support for SiFive SoCs - - - --- 2019-04-15 Yash Shah New
[1/3] RISC-V: Add DT documentation for SiFive L2 Cache Controller L2 cache controller and EDAC support for SiFive SoCs - - - --- 2019-04-15 Yash Shah New
[v2,3/3] riscv: Add support for libdw riscv: Add perf callchain support - - - --- 2019-04-15 Mao Han New
[v2,2/3] riscv: Add support for perf registers sampling riscv: Add perf callchain support - - - --- 2019-04-15 Mao Han New
[v2,1/3] riscv: Add perf callchain support riscv: Add perf callchain support - - - --- 2019-04-15 Mao Han New
[v3,3/3] RISC-V: Access CSRs using CSR numbers Allow accessing CSR using CSR number - 1 - --- 2019-04-15 Anup Patel New
[v3,2/3] RISC-V: Add interrupt related SCAUSE defines in asm/csr.h Allow accessing CSR using CSR number - - - --- 2019-04-15 Anup Patel New
[v3,1/3] RISC-V: Use tabs to align macro values in asm/csr.h Allow accessing CSR using CSR number - 1 - --- 2019-04-15 Anup Patel New
[11/11] riscv: call pm_power_off from machine_halt / machine_power_off [01/11] riscv: use asm-generic/extable.h - 1 - --- 2019-04-15 Christoph Hellwig New
[10/11] riscv: print the unexpected interrupt cause [01/11] riscv: use asm-generic/extable.h - 1 - --- 2019-04-15 Christoph Hellwig New
[09/11] riscv: remove duplicate macros from ptrace.h [01/11] riscv: use asm-generic/extable.h - - - --- 2019-04-15 Christoph Hellwig New
[08/11] riscv: remove unreachable !HAVE_FUNCTION_GRAPH_RET_ADDR_PTR code [01/11] riscv: use asm-generic/extable.h - - - --- 2019-04-15 Christoph Hellwig New
[07/11] riscv: cleanup the parse_dtb calling conventions [01/11] riscv: use asm-generic/extable.h - - - --- 2019-04-15 Christoph Hellwig New
[06/11] riscv: simplify the stack pointer setup in head.S [01/11] riscv: use asm-generic/extable.h - 1 - --- 2019-04-15 Christoph Hellwig New
[05/11] riscv: clear all pending interrupts when booting [01/11] riscv: use asm-generic/extable.h - 2 - --- 2019-04-15 Christoph Hellwig New
[04/11] riscv: remove CONFIG_RISCV_ISA_A [01/11] riscv: use asm-generic/extable.h - - - --- 2019-04-15 Christoph Hellwig New
[03/11] riscv: remove unreachable big endian code [01/11] riscv: use asm-generic/extable.h - - - --- 2019-04-15 Christoph Hellwig New
[02/11] riscv: turn mm_segment_t into a struct [01/11] riscv: use asm-generic/extable.h - - - --- 2019-04-15 Christoph Hellwig New
[01/11] riscv: use asm-generic/extable.h [01/11] riscv: use asm-generic/extable.h - - - --- 2019-04-15 Christoph Hellwig New
[v2,3/3] RISC-V: Access CSRs using CSR numbers Allow accessing CSR using CSR number - - - --- 2019-04-13 Anup Patel New
[v2,2/3] RISC-V: Add interrupt related SCAUSE defines in asm/encoding.h Allow accessing CSR using CSR number - - - --- 2019-04-13 Anup Patel New
[v2,1/3] RISC-V: Add separate asm/encoding.h for spec related defines Allow accessing CSR using CSR number - - - --- 2019-04-13 Anup Patel New
[3/3] RISC-V: Access CSRs using CSR numbers Allow accessing CSR using CSR number - - - --- 2019-04-13 Anup Patel New
[2/3] RISC-V: Add defines for CSR numbers Allow accessing CSR using CSR number - - - --- 2019-04-13 Anup Patel New
[1/3] RISC-V: Add separate asm/encoding.h for spec related defines Allow accessing CSR using CSR number - - - --- 2019-04-13 Anup Patel New
[v5,2/2] tty: serial: add driver for the SiFive UART tty: serial: add DT bindings and serial driver for the SiFive FU540 UART - - 1 --- 2019-04-13 Paul Walmsley New
[v5,1/2] dt-bindings: serial: add documentation for the SiFive UART driver tty: serial: add DT bindings and serial driver for the SiFive FU540 UART - 1 - --- 2019-04-13 Paul Walmsley New
[12/12] riscv: call pm_power_off from machine_halt / machine_power_off [01/12] riscv: use asm-generic/extable.h - 1 - --- 2019-04-12 Christoph Hellwig New
[11/12] riscv: print the unexpected interrupt cause [01/12] riscv: use asm-generic/extable.h - 1 - --- 2019-04-12 Christoph Hellwig New
[10/12] riscv: remove duplicate macros from ptrace.h [01/12] riscv: use asm-generic/extable.h - - - --- 2019-04-12 Christoph Hellwig New
[09/12] riscv: remove unreachable !HAVE_FUNCTION_GRAPH_RET_ADDR_PTR code [01/12] riscv: use asm-generic/extable.h - - - --- 2019-04-12 Christoph Hellwig New
[08/12] riscv: remove unreachable !CONFIG_FRAME_POINTER code [01/12] riscv: use asm-generic/extable.h - - - --- 2019-04-12 Christoph Hellwig New
[07/12] riscv: cleanup the parse_dtb calling conventions [01/12] riscv: use asm-generic/extable.h - - - --- 2019-04-12 Christoph Hellwig New
[06/12] riscv: simplify the stack pointer setup in head.S [01/12] riscv: use asm-generic/extable.h - 1 - --- 2019-04-12 Christoph Hellwig New
[05/12] riscv: clear all pending interrupts when booting [01/12] riscv: use asm-generic/extable.h - 2 - --- 2019-04-12 Christoph Hellwig New
[04/12] riscv: remove CONFIG_RISCV_ISA_A [01/12] riscv: use asm-generic/extable.h - - - --- 2019-04-12 Christoph Hellwig New
[03/12] riscv: remove unreachable big endian code [01/12] riscv: use asm-generic/extable.h - - - --- 2019-04-12 Christoph Hellwig New
[02/12] riscv: turn mm_segment_t into a struct [01/12] riscv: use asm-generic/extable.h - - - --- 2019-04-12 Christoph Hellwig New
[01/12] riscv: use asm-generic/extable.h [01/12] riscv: use asm-generic/extable.h - - - --- 2019-04-12 Christoph Hellwig New
[9/9] riscv: call pm_power_off from machine_halt / machine_power_off [1/9] riscv: use asm-generic/extable.h - 1 - --- 2019-04-11 Christoph Hellwig New
[8/9] riscv: print the unexpected interrupt cause [1/9] riscv: use asm-generic/extable.h - 1 - --- 2019-04-11 Christoph Hellwig New
[7/9] riscv: remove duplicate macros from ptrace.h [1/9] riscv: use asm-generic/extable.h - 2 - --- 2019-04-11 Christoph Hellwig New
[6/9] riscv: also clear all pending interrupts when booting [1/9] riscv: use asm-generic/extable.h - 2 - --- 2019-04-11 Christoph Hellwig New
[5/9] riscv: simplify stack pointer setup in head.S [1/9] riscv: use asm-generic/extable.h - 1 - --- 2019-04-11 Christoph Hellwig New
[4/9] riscv: turn mm_segment_t into a struct [1/9] riscv: use asm-generic/extable.h - - - --- 2019-04-11 Christoph Hellwig New
[3/9] riscv: remove CONFIG_RISCV_ISA_A [1/9] riscv: use asm-generic/extable.h - - - --- 2019-04-11 Christoph Hellwig New
[2/9] riscv: remove dead big endian code [1/9] riscv: use asm-generic/extable.h - - - --- 2019-04-11 Christoph Hellwig New
[1/9] riscv: use asm-generic/extable.h [1/9] riscv: use asm-generic/extable.h - 1 - --- 2019-04-11 Christoph Hellwig New
[v4,2/2] tty: serial: add driver for the SiFive UART tty: serial: add DT bindings and serial driver for the SiFive FU540 UART - - - --- 2019-04-11 Paul Walmsley New
[v4,1/2] dt-bindings: serial: add documentation for the SiFive UART driver tty: serial: add DT bindings and serial driver for the SiFive FU540 UART - - - --- 2019-04-11 Paul Walmsley New
[6/6] riscv: defconfig: enable ARCH_SIFIVE [1/6] arch: riscv: add support for building DTB files from DT source data - - - --- 2019-04-11 Paul Walmsley New
[5/6] riscv: dts: add initial board data for the SiFive HiFive Unleashed [1/6] arch: riscv: add support for building DTB files from DT source data - - - --- 2019-04-11 Paul Walmsley New
[4/6] riscv: dts: add initial support for the SiFive FU540-C000 SoC [1/6] arch: riscv: add support for building DTB files from DT source data - - - --- 2019-04-11 Paul Walmsley New
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