Show patches with: Submitter = Jisheng Zhang       |    State = Action Required       |    Archived = No       |   13 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
riscv: mm: still create swiotlb buffer for kmalloc() bouncing if required riscv: mm: still create swiotlb buffer for kmalloc() bouncing if required - - - 10-3 2023-11-26 Jisheng Zhang New
[2/2] riscv: cmpxchg: implement arch_cmpxchg64_{relaxed|acquire|release} riscv: enable lockless lockref implementation - - - 112- 2023-11-25 Jisheng Zhang New
[1/2] riscv: select ARCH_USE_CMPXCHG_LOCKREF riscv: enable lockless lockref implementation - - - 112- 2023-11-25 Jisheng Zhang New
riscv: Select ARCH_WANTS_NO_INSTR riscv: Select ARCH_WANTS_NO_INSTR - - - 13-- 2023-11-23 Jisheng Zhang New
riscv: Use asm-generic for {read,write}{bwlq} and their relaxed variant riscv: Use asm-generic for {read,write}{bwlq} and their relaxed variant - - - 10-3 2023-11-23 Jisheng Zhang New
riscv: mm: implement pgprot_nx riscv: mm: implement pgprot_nx - 2 1 13-- 2023-11-21 Jisheng Zhang New
riscv: select ARCH_HAS_FAST_MULTIPLIER riscv: select ARCH_HAS_FAST_MULTIPLIER - 1 1 13-- 2023-11-21 Jisheng Zhang New
[RESEND,v4,2/2] riscv: errata: thead: use pa based instructions for CMO riscv: errata: thead: use riscv_nonstd_cache_ops for CMO - 1 - 12-1 2023-11-14 Jisheng Zhang New
[RESEND,v4,1/2] riscv: errata: thead: use riscv_nonstd_cache_ops for CMO riscv: errata: thead: use riscv_nonstd_cache_ops for CMO - 1 1 11-2 2023-11-14 Jisheng Zhang New
[2/2] riscv: dts: sophgo: set pinctrl for uart0 riscv: sophgo: add pinctrl support for cv1800b - - - --1 2023-11-13 Jisheng Zhang conchuod New
[1/2] riscv: dts: cv1800b: add pinctrl node for cv1800b riscv: sophgo: add pinctrl support for cv1800b - - - --1 2023-11-13 Jisheng Zhang conchuod New
[RT,v2,2/2] riscv: allow to enable RT riscv: add PREEMPT_RT support - - - 1211 2023-10-31 Jisheng Zhang New
[RT,v2,1/2] riscv: add PREEMPT_AUTO support riscv: add PREEMPT_RT support - - - 1121 2023-10-31 Jisheng Zhang New