Show patches with: Submitter = Jisheng Zhang       |    State = Action Required       |    Archived = No       |   11 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v2,1/3] clocksource/drivers/timer-riscv: Add set_state_oneshot_stopped clocksouce/timer-clint|riscv: some improvements - - - 13-- 2024-04-06 Jisheng Zhang New
[v2,2/3] clocksource/drivers/timer-clint: Add set_state_shutdown clocksouce/timer-clint|riscv: some improvements - - - 13-- 2024-04-06 Jisheng Zhang New
[v2,3/3] clocksource/drivers/timer-clint: Add set_state_oneshot_stopped clocksouce/timer-clint|riscv: some improvements - - - 13-- 2024-04-06 Jisheng Zhang New
[v2] riscv: Use asm-generic for {read,write}{bwlq} and their relaxed variant [v2] riscv: Use asm-generic for {read,write}{bwlq} and their relaxed variant - 1 - 13-- 2023-12-02 Jisheng Zhang New
[v3,1/2] riscv: nommu: remove PAGE_OFFSET hardcoding riscv: improve nommu and timer-clint - - - --1 2024-04-10 Jisheng Zhang New
[v3,2/2] clocksource/drivers/timer-clint: Add T-Head C9xx clint riscv: improve nommu and timer-clint - - - --1 2024-04-10 Jisheng Zhang New
[v3,RESEND,1/2] riscv: select ARCH_USE_CMPXCHG_LOCKREF riscv: enable lockless lockref implementation - 1 - --- 2024-03-25 Jisheng Zhang New
[v3,RESEND,2/2] riscv: cmpxchg: implement arch_cmpxchg64_{relaxed|acquire|release} riscv: enable lockless lockref implementation - 1 - --- 2024-03-25 Jisheng Zhang New
[v3,RESEND] riscv: mm: still create swiotlb buffer for kmalloc() bouncing if required [v3,RESEND] riscv: mm: still create swiotlb buffer for kmalloc() bouncing if required - 1 - 13-- 2024-03-25 Jisheng Zhang New
[v3,RESEND] riscv: select ARCH_HAS_FAST_MULTIPLIER [v3,RESEND] riscv: select ARCH_HAS_FAST_MULTIPLIER - 2 1 13-- 2024-03-25 Jisheng Zhang New
riscv: boot: remove duplicated targets line riscv: boot: remove duplicated targets line - - - 13-- 2024-04-14 Jisheng Zhang New