| Message ID | 20220815050815.22340-2-samuel@sholland.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | riscv: Allwinner D1 platform support | expand |
Am Montag, 15. August 2022, 07:08:04 CEST schrieb Samuel Holland: > Allwinner sunxi SoCs with a RISC-V CPU use the sun20i designator. Match > that pattern in addition to the designators for 32 and 64-bit ARM SoCs. > > Signed-off-by: Samuel Holland <samuel@sholland.org> > --- > > MAINTAINERS | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/MAINTAINERS b/MAINTAINERS > index 8a5012ba6ff9..59bcaa405a6f 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -1800,7 +1800,7 @@ F: drivers/pinctrl/sunxi/ > F: drivers/soc/sunxi/ > N: allwinner > N: sun[x456789]i > -N: sun50i > +N: sun[25]0i > > ARM/Amlogic Meson SoC CLOCK FRAMEWORK > M: Neil Armstrong <narmstrong@baylibre.com> > Reviewed-by: Heiko Stuebner <heiko@sntech.de>
diff --git a/MAINTAINERS b/MAINTAINERS index 8a5012ba6ff9..59bcaa405a6f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1800,7 +1800,7 @@ F: drivers/pinctrl/sunxi/ F: drivers/soc/sunxi/ N: allwinner N: sun[x456789]i -N: sun50i +N: sun[25]0i ARM/Amlogic Meson SoC CLOCK FRAMEWORK M: Neil Armstrong <narmstrong@baylibre.com>
Allwinner sunxi SoCs with a RISC-V CPU use the sun20i designator. Match that pattern in addition to the designators for 32 and 64-bit ARM SoCs. Signed-off-by: Samuel Holland <samuel@sholland.org> --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)