Message ID | 20230125142056.18356-6-andy.chiu@sifive.com (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Palmer Dabbelt |
Headers | show |
Series | riscv: Add vector ISA support | expand |
Context | Check | Description |
---|---|---|
conchuod/cover_letter | success | Series has a cover letter |
conchuod/tree_selection | success | Guessed tree name to be for-next |
conchuod/fixes_present | success | Fixes tag not required for -next series |
conchuod/maintainers_pattern | success | MAINTAINERS pattern errors before the patch: 13 and now 13 |
conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
conchuod/module_param | success | Was 0 now: 0 |
conchuod/build_rv64_gcc_allmodconfig | success | Errors and warnings before: 0 this patch: 0 |
conchuod/alphanumeric_selects | success | Out of order selects before the patch: 57 and now 57 |
conchuod/build_rv32_defconfig | success | Build OK |
conchuod/dtb_warn_rv64 | success | Errors and warnings before: 2 this patch: 2 |
conchuod/header_inline | success | No static functions without inline keyword in header files |
conchuod/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 39 lines checked |
conchuod/source_inline | success | Was 0 now: 0 |
conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
conchuod/verify_fixes | success | No Fixes tag |
conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
On Wed, Jan 25, 2023 at 02:20:42PM +0000, Andy Chiu wrote: > Disable vector instructions execution for kernel mode at its entrances. > > Signed-off-by: Guo Ren <guoren@linux.alibaba.com> > Co-developed-by: Vincent Chen <vincent.chen@sifive.com> > Signed-off-by: Vincent Chen <vincent.chen@sifive.com> > Co-developed-by: Han-Kuan Chen <hankuan.chen@sifive.com> > Signed-off-by: Han-Kuan Chen <hankuan.chen@sifive.com> > Co-developed-by: Greentime Hu <greentime.hu@sifive.com> > Signed-off-by: Greentime Hu <greentime.hu@sifive.com> > Signed-off-by: Vineet Gupta <vineetg@rivosinc.com> > [vineetg: split off vecreg file clearing] > Signed-off-by: Andy Chiu <andy.chiu@sifive.com> That's a hilarious co-developed-by list for adding "| foo". I can only assume that this is mostly related to the asm that was removed by Vineet? Either way: Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > --- > arch/riscv/kernel/entry.S | 6 +++--- > arch/riscv/kernel/head.S | 12 ++++++------ > 2 files changed, 9 insertions(+), 9 deletions(-) > > diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S > index 99d38fdf8b18..e38676d9a0d6 100644 > --- a/arch/riscv/kernel/entry.S > +++ b/arch/riscv/kernel/entry.S > @@ -77,10 +77,10 @@ _save_context: > * Disable user-mode memory access as it should only be set in the > * actual user copy routines. > * > - * Disable the FPU to detect illegal usage of floating point in kernel > - * space. > + * Disable the FPU/Vector to detect illegal usage of floating point > + * or vector in kernel space. > */ > - li t0, SR_SUM | SR_FS > + li t0, SR_SUM | SR_FS_VS > > REG_L s0, TASK_TI_USER_SP(tp) > csrrc s1, CSR_STATUS, t0 > diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S > index ea803c96eeff..7cc975ce619d 100644 > --- a/arch/riscv/kernel/head.S > +++ b/arch/riscv/kernel/head.S > @@ -140,10 +140,10 @@ secondary_start_sbi: > .option pop > > /* > - * Disable FPU to detect illegal usage of > - * floating point in kernel space > + * Disable FPU & VECTOR to detect illegal usage of > + * floating point or vector in kernel space > */ > - li t0, SR_FS > + li t0, SR_FS_VS > csrc CSR_STATUS, t0 > > /* Set trap vector to spin forever to help debug */ > @@ -234,10 +234,10 @@ pmp_done: > .option pop > > /* > - * Disable FPU to detect illegal usage of > - * floating point in kernel space > + * Disable FPU & VECTOR to detect illegal usage of > + * floating point or vector in kernel space > */ > - li t0, SR_FS > + li t0, SR_FS_VS > csrc CSR_STATUS, t0 > > #ifdef CONFIG_RISCV_BOOT_SPINWAIT > -- > 2.17.1 >
diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index 99d38fdf8b18..e38676d9a0d6 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -77,10 +77,10 @@ _save_context: * Disable user-mode memory access as it should only be set in the * actual user copy routines. * - * Disable the FPU to detect illegal usage of floating point in kernel - * space. + * Disable the FPU/Vector to detect illegal usage of floating point + * or vector in kernel space. */ - li t0, SR_SUM | SR_FS + li t0, SR_SUM | SR_FS_VS REG_L s0, TASK_TI_USER_SP(tp) csrrc s1, CSR_STATUS, t0 diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index ea803c96eeff..7cc975ce619d 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -140,10 +140,10 @@ secondary_start_sbi: .option pop /* - * Disable FPU to detect illegal usage of - * floating point in kernel space + * Disable FPU & VECTOR to detect illegal usage of + * floating point or vector in kernel space */ - li t0, SR_FS + li t0, SR_FS_VS csrc CSR_STATUS, t0 /* Set trap vector to spin forever to help debug */ @@ -234,10 +234,10 @@ pmp_done: .option pop /* - * Disable FPU to detect illegal usage of - * floating point in kernel space + * Disable FPU & VECTOR to detect illegal usage of + * floating point or vector in kernel space */ - li t0, SR_FS + li t0, SR_FS_VS csrc CSR_STATUS, t0 #ifdef CONFIG_RISCV_BOOT_SPINWAIT