@@ -221,6 +221,14 @@ config PAGE_OFFSET
default 0x80000000 if !MMU
default 0xff60000000000000 if 64BIT
+config RISCV_HW_PAGE_SHIFT
+ int
+ default 12
+
+config RISCV_PAGE_SHIFT
+ int
+ default 12
+
config KASAN_SHADOW_OFFSET
hex
depends on KASAN_GENERIC
@@ -12,7 +12,11 @@
#include <linux/pfn.h>
#include <linux/const.h>
-#define PAGE_SHIFT (12)
+#define HW_PAGE_SHIFT CONFIG_RISCV_HW_PAGE_SHIFT
+#define HW_PAGE_SIZE (_AC(1, UL) << HW_PAGE_SHIFT)
+#define HW_PAGE_MASK (~(HW_PAGE_SIZE - 1))
+
+#define PAGE_SHIFT CONFIG_RISCV_PAGE_SHIFT
#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
#define PAGE_MASK (~(PAGE_SIZE - 1))
The key idea to implement larger base page based on MMU that only supports 4K page is to decouple the MMU page from the software page in view of kernel mm. In contrary to software page, we denote the MMU page as hardware page. To decouple these two kinds of pages, we should manage, allocate and map memory at a granularity of software page, which is exactly what existing mm code does. The page table operations, however, should configure page table entries at a granularity of hardware page, which is the responsibility of arch code. This commit introduces the concept of hardware base page for RISCV. Signed-off-by: Xu Lu <luxu.kernel@bytedance.com> --- arch/riscv/Kconfig | 8 ++++++++ arch/riscv/include/asm/page.h | 6 +++++- 2 files changed, 13 insertions(+), 1 deletion(-)