diff mbox series

[v3,11/11] riscv: dts: spacemit: add uart1 node for K1 SoC

Message ID 20240703-k1-01-basic-dt-v3-11-12f73b47461e@gentoo.org (mailing list archive)
State New
Headers show
Series riscv: add initial support for SpacemiT K1 | expand

Checks

Context Check Description
conchuod/vmtest-for-next-PR success PR summary
conchuod/patch-11-test-1 success .github/scripts/patches/tests/build_rv32_defconfig.sh
conchuod/patch-11-test-2 success .github/scripts/patches/tests/build_rv64_clang_allmodconfig.sh
conchuod/patch-11-test-3 success .github/scripts/patches/tests/build_rv64_gcc_allmodconfig.sh
conchuod/patch-11-test-4 success .github/scripts/patches/tests/build_rv64_nommu_k210_defconfig.sh
conchuod/patch-11-test-5 success .github/scripts/patches/tests/build_rv64_nommu_virt_defconfig.sh
conchuod/patch-11-test-6 success .github/scripts/patches/tests/checkpatch.sh
conchuod/patch-11-test-7 success .github/scripts/patches/tests/dtb_warn_rv64.sh
conchuod/patch-11-test-8 success .github/scripts/patches/tests/header_inline.sh
conchuod/patch-11-test-9 success .github/scripts/patches/tests/kdoc.sh
conchuod/patch-11-test-10 success .github/scripts/patches/tests/module_param.sh
conchuod/patch-11-test-11 success .github/scripts/patches/tests/verify_fixes.sh
conchuod/patch-11-test-12 success .github/scripts/patches/tests/verify_signedoff.sh

Commit Message

Yixun Lan July 3, 2024, 2:55 p.m. UTC
Devices in 0xf000,0000 - 0xf080,0000 are reserved for TEE purpose,
so add uart1 here but mark its status as reserved.

Signed-off-by: Yixun Lan <dlan@gentoo.org>

---
This patch can be folded into "riscv: dts: add initial SpacemiT K1 SoC device tree",
if maintainer finds it's too trivial to have an independent patch..
---
 arch/riscv/boot/dts/spacemit/k1.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Jisheng Zhang July 4, 2024, 2:05 p.m. UTC | #1
On Wed, Jul 03, 2024 at 02:55:14PM +0000, Yixun Lan wrote:
> Devices in 0xf000,0000 - 0xf080,0000 are reserved for TEE purpose,
> so add uart1 here but mark its status as reserved.

This patch doesn't deserve a seperate patch, it's better to fold it
into the dtsi one.

> 
> Signed-off-by: Yixun Lan <dlan@gentoo.org>
> 
> ---
> This patch can be folded into "riscv: dts: add initial SpacemiT K1 SoC device tree",
> if maintainer finds it's too trivial to have an independent patch..
> ---
>  arch/riscv/boot/dts/spacemit/k1.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
> index a076e35855a2e..fee8921513c1f 100644
> --- a/arch/riscv/boot/dts/spacemit/k1.dtsi
> +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
> @@ -372,5 +372,15 @@ clint: timer@e4000000 {
>  					      <&cpu6_intc 3>, <&cpu6_intc 7>,
>  					      <&cpu7_intc 3>, <&cpu7_intc 7>;
>  		};
> +
> +		sec_uart1: serial@f0612000 {
> +			compatible = "spacemit,k1-uart", "intel,xscale-uart";
> +			reg = <0x0 0xf0612000 0x0 0x100>;
> +			interrupts = <43>;
> +			clock-frequency = <14857000>;
> +			reg-shift = <2>;
> +			reg-io-width = <4>;
> +			status = "reserved"; /* for TEE usage */
> +		};
>  	};
>  };
> 
> -- 
> 2.45.2
> 
> 
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
Yixun Lan July 5, 2024, 6:49 a.m. UTC | #2
On 22:05 Thu 04 Jul     , Jisheng Zhang wrote:
> On Wed, Jul 03, 2024 at 02:55:14PM +0000, Yixun Lan wrote:
> > Devices in 0xf000,0000 - 0xf080,0000 are reserved for TEE purpose,
> > so add uart1 here but mark its status as reserved.
> 
> This patch doesn't deserve a seperate patch, it's better to fold it
> into the dtsi one.

fine, I will address it in next revision
diff mbox series

Patch

diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
index a076e35855a2e..fee8921513c1f 100644
--- a/arch/riscv/boot/dts/spacemit/k1.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
@@ -372,5 +372,15 @@  clint: timer@e4000000 {
 					      <&cpu6_intc 3>, <&cpu6_intc 7>,
 					      <&cpu7_intc 3>, <&cpu7_intc 7>;
 		};
+
+		sec_uart1: serial@f0612000 {
+			compatible = "spacemit,k1-uart", "intel,xscale-uart";
+			reg = <0x0 0xf0612000 0x0 0x100>;
+			interrupts = <43>;
+			clock-frequency = <14857000>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			status = "reserved"; /* for TEE usage */
+		};
 	};
 };