diff mbox series

[v4,3/3] riscv: dts: spacemit: add pinctrl property to uart0 in BPI-F3

Message ID 7ede7ca6-f8db-4b38-a1cc-8be3d0db7fae@gmail.com (mailing list archive)
State New
Headers show
Series None | expand

Commit Message

Jesse T Sept. 15, 2024, 2:45 p.m. UTC
Before pinctrl driver implemented, the uart0 controller reply on
bootloader for setting correct pin mux and configurations.

Now, let's add pinctrl property to uart0 of Bananapi-F3 board.

Signed-off-by: Yixun Lan <dlan@gentoo.org>
---
  arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts |  3 +++
  arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi    | 20 ++++++++++++++++++++
  arch/riscv/boot/dts/spacemit/k1.dtsi            |  5 +++++
  3 files changed, 28 insertions(+)

Comments

Yixun Lan Sept. 16, 2024, 2:45 a.m. UTC | #1
Hi Jesse

On 10:45 Sun 15 Sep     , Jesse Taube wrote:
> 
> Before pinctrl driver implemented, the uart0 controller reply on
> bootloader for setting correct pin mux and configurations.
> 
> Now, let's add pinctrl property to uart0 of Bananapi-F3 board.
> 
> Signed-off-by: Yixun Lan <dlan@gentoo.org>
> ---
>   arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts |  3 +++
>   arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi    | 20 ++++++++++++++++++++
>   arch/riscv/boot/dts/spacemit/k1.dtsi            |  5 +++++
>   3 files changed, 28 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts 
> b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
> index 023274189b492..bc88d4de25a62 100644
> --- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
> +++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
> @@ -4,6 +4,7 @@
>    */
> 
>   #include "k1.dtsi"
> +#include "k1-pinctrl.dtsi"
> 
>   / {
>   	model = "Banana Pi BPI-F3";
> @@ -15,5 +16,7 @@ chosen {
>   };
> 
>   &uart0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&uart0_2_cfg>;
>   	status = "okay";
>   };
> diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi 
> b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> new file mode 100644
> index 0000000000000..a8eac5517f857
> --- /dev/null
> +++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> @@ -0,0 +1,20 @@
> +// SPDX-License-Identifier: GPL-2.0 OR MIT
> +/*
> + * Copyright (c) 2024 Yixun Lan <dlan@gentoo.org>
> + */
> +
> +#include <dt-bindings/gpio/gpio.h>
> +
> +#define K1_PADCONF(pin, func) (((pin) << 16) | (func))
> 
> It would be nice to have a pinfunc header like
> arch/arm/boot/dts/nxp/imx/imx7ulp-pinfunc.h.
> It would reference and encode the data of "3.2 Pin Multiplex" in
> https://developer.spacemit.com/documentation?token=An1vwTwKaigaXRkYfwmcznTXned 
> , the document you attached in the summary.
Not sure if it's worth the effort..

I gave up of introducing another macro, as it's exactly one to one mapping to
GPIO ID, which mean pin(x) -> GPIO_x

maybe I could put a comment at K1_PADCONF() to document this?

/* pin is same to the GPIO id according to 3.2 Pin Multiplex of User Manual */
#define K1_PADCONF(pin, func) (((pin) << 16) | (func))

does this sound good to you?

> 
> Otherwise,
> Acked-by: Jesse Taube <Mr.Bossman075@gmail.com>
> 
thanks

> +
> +&pinctrl {
> +	uart0_2_cfg: uart0-2-cfg {
> +		uart0-2-pins {
> +			pinmux = <K1_PADCONF(68, 2)>,
> +				 <K1_PADCONF(69, 2)>;
> +
> +			bias-pull-up = <0>;
> +			drive-strength = <32>;
> +		};
> +	};
> +};
> diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi 
> b/arch/riscv/boot/dts/spacemit/k1.dtsi
> index 0777bf9e01183..a2d5f7d4a942a 100644
> --- a/arch/riscv/boot/dts/spacemit/k1.dtsi
> +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
> @@ -416,6 +416,11 @@ uart9: serial@d4017800 {
>   			status = "disabled";
>   		};
> 
> +		pinctrl: pinctrl@d401e000 {
> +			compatible = "spacemit,k1-pinctrl";
> +			reg = <0x0 0xd401e000 0x0 0x400>;
> +		};
> +
>   		plic: interrupt-controller@e0000000 {
>   			compatible = "spacemit,k1-plic", "sifive,plic-1.0.0";
>   			reg = <0x0 0xe0000000 0x0 0x4000000>;
> 
> -- 
> 2.45.2
Jesse T Sept. 16, 2024, 2:18 p.m. UTC | #2
On Sun, Sep 15, 2024 at 10:45 PM Yixun Lan <dlan@gentoo.org> wrote:
>
> Hi Jesse
>
> On 10:45 Sun 15 Sep     , Jesse Taube wrote:
> >
> > Before pinctrl driver implemented, the uart0 controller reply on
> > bootloader for setting correct pin mux and configurations.
> >
> > Now, let's add pinctrl property to uart0 of Bananapi-F3 board.
> >
> > Signed-off-by: Yixun Lan <dlan@gentoo.org>
> > ---
> >   arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts |  3 +++
> >   arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi    | 20 ++++++++++++++++++++
> >   arch/riscv/boot/dts/spacemit/k1.dtsi            |  5 +++++
> >   3 files changed, 28 insertions(+)
> >
> > diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
> > b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
> > index 023274189b492..bc88d4de25a62 100644
> > --- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
> > +++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
> > @@ -4,6 +4,7 @@
> >    */
> >
> >   #include "k1.dtsi"
> > +#include "k1-pinctrl.dtsi"
> >
> >   / {
> >       model = "Banana Pi BPI-F3";
> > @@ -15,5 +16,7 @@ chosen {
> >   };
> >
> >   &uart0 {
> > +     pinctrl-names = "default";
> > +     pinctrl-0 = <&uart0_2_cfg>;
> >       status = "okay";
> >   };
> > diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> > b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> > new file mode 100644
> > index 0000000000000..a8eac5517f857
> > --- /dev/null
> > +++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> > @@ -0,0 +1,20 @@
> > +// SPDX-License-Identifier: GPL-2.0 OR MIT
> > +/*
> > + * Copyright (c) 2024 Yixun Lan <dlan@gentoo.org>
> > + */
> > +
> > +#include <dt-bindings/gpio/gpio.h>
> > +
> > +#define K1_PADCONF(pin, func) (((pin) << 16) | (func))
> >
> > It would be nice to have a pinfunc header like
> > arch/arm/boot/dts/nxp/imx/imx7ulp-pinfunc.h.
> > It would reference and encode the data of "3.2 Pin Multiplex" in
> > https://developer.spacemit.com/documentation?token=An1vwTwKaigaXRkYfwmcznTXned
> > , the document you attached in the summary.
> Not sure if it's worth the effort..

I can send a future patch for this.

>
> I gave up of introducing another macro, as it's exactly one to one mapping to
> GPIO ID, which mean pin(x) -> GPIO_x
>
> maybe I could put a comment at K1_PADCONF() to document this?

I'm weary the Manual may not exist on the site in the future or
will change formats. But it would be nice otherwise.

>
> /* pin is same to the GPIO id according to 3.2 Pin Multiplex of User Manual */
> #define K1_PADCONF(pin, func) (((pin) << 16) | (func))
>
> does this sound good to you?

Sure, add it.

Also sorry for messing up the reply-to thing thunderbird is confusing.

Thanks,
Jesse Taube

>
> >
> > Otherwise,
> > Acked-by: Jesse Taube <Mr.Bossman075@gmail.com>
> >
> thanks
>
> > +
> > +&pinctrl {
> > +     uart0_2_cfg: uart0-2-cfg {
> > +             uart0-2-pins {
> > +                     pinmux = <K1_PADCONF(68, 2)>,
> > +                              <K1_PADCONF(69, 2)>;
> > +
> > +                     bias-pull-up = <0>;
> > +                     drive-strength = <32>;
> > +             };
> > +     };
> > +};
> > diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi
> > b/arch/riscv/boot/dts/spacemit/k1.dtsi
> > index 0777bf9e01183..a2d5f7d4a942a 100644
> > --- a/arch/riscv/boot/dts/spacemit/k1.dtsi
> > +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
> > @@ -416,6 +416,11 @@ uart9: serial@d4017800 {
> >                       status = "disabled";
> >               };
> >
> > +             pinctrl: pinctrl@d401e000 {
> > +                     compatible = "spacemit,k1-pinctrl";
> > +                     reg = <0x0 0xd401e000 0x0 0x400>;
> > +             };
> > +
> >               plic: interrupt-controller@e0000000 {
> >                       compatible = "spacemit,k1-plic", "sifive,plic-1.0.0";
> >                       reg = <0x0 0xe0000000 0x0 0x4000000>;
> >
> > --
> > 2.45.2
>
> --
> Yixun Lan (dlan)
> Gentoo Linux Developer
> GPG Key ID AABEFD55
Yixun Lan Sept. 16, 2024, 11:47 p.m. UTC | #3
Hi Jesse:

On 10:18 Mon 16 Sep     , Jesse T wrote:
> On Sun, Sep 15, 2024 at 10:45 PM Yixun Lan <dlan@gentoo.org> wrote:
> >
> > Hi Jesse
> >
> > On 10:45 Sun 15 Sep     , Jesse Taube wrote:
> > >
> > > Before pinctrl driver implemented, the uart0 controller reply on
> > > bootloader for setting correct pin mux and configurations.
> > >
> > > Now, let's add pinctrl property to uart0 of Bananapi-F3 board.
> > >
> > > Signed-off-by: Yixun Lan <dlan@gentoo.org>
> > > ---
> > >   arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts |  3 +++
> > >   arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi    | 20 ++++++++++++++++++++
> > >   arch/riscv/boot/dts/spacemit/k1.dtsi            |  5 +++++
> > >   3 files changed, 28 insertions(+)
> > >
> > > diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
> > > b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
> > > index 023274189b492..bc88d4de25a62 100644
> > > --- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
> > > +++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
> > > @@ -4,6 +4,7 @@
> > >    */
> > >
> > >   #include "k1.dtsi"
> > > +#include "k1-pinctrl.dtsi"
> > >
> > >   / {
> > >       model = "Banana Pi BPI-F3";
> > > @@ -15,5 +16,7 @@ chosen {
> > >   };
> > >
> > >   &uart0 {
> > > +     pinctrl-names = "default";
> > > +     pinctrl-0 = <&uart0_2_cfg>;
> > >       status = "okay";
> > >   };
> > > diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> > > b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> > > new file mode 100644
> > > index 0000000000000..a8eac5517f857
> > > --- /dev/null
> > > +++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> > > @@ -0,0 +1,20 @@
> > > +// SPDX-License-Identifier: GPL-2.0 OR MIT
> > > +/*
> > > + * Copyright (c) 2024 Yixun Lan <dlan@gentoo.org>
> > > + */
> > > +
> > > +#include <dt-bindings/gpio/gpio.h>
> > > +
> > > +#define K1_PADCONF(pin, func) (((pin) << 16) | (func))
> > >
> > > It would be nice to have a pinfunc header like
> > > arch/arm/boot/dts/nxp/imx/imx7ulp-pinfunc.h.
> > > It would reference and encode the data of "3.2 Pin Multiplex" in
> > > https://developer.spacemit.com/documentation?token=An1vwTwKaigaXRkYfwmcznTXned
> > > , the document you attached in the summary.
> > Not sure if it's worth the effort..
> 
> I can send a future patch for this.
> 
Ok, thanks, no objection from my side
but, that gonna be a lot work as you need to list ALL the functions..

> >
> > I gave up of introducing another macro, as it's exactly one to one mapping to
> > GPIO ID, which mean pin(x) -> GPIO_x
> >
> > maybe I could put a comment at K1_PADCONF() to document this?
> 
> I'm weary the Manual may not exist on the site in the future or
> will change formats. But it would be nice otherwise.
> 
> >
> > /* pin is same to the GPIO id according to 3.2 Pin Multiplex of User Manual */
> > #define K1_PADCONF(pin, func) (((pin) << 16) | (func))
> >
> > does this sound good to you?
> 
> Sure, add it.
> 
> Also sorry for messing up the reply-to thing thunderbird is confusing.
> 
> Thanks,
> Jesse Taube
> 
> >
> > >
> > > Otherwise,
> > > Acked-by: Jesse Taube <Mr.Bossman075@gmail.com>
> > >
> > thanks
> >
> > > +
> > > +&pinctrl {
> > > +     uart0_2_cfg: uart0-2-cfg {
> > > +             uart0-2-pins {
> > > +                     pinmux = <K1_PADCONF(68, 2)>,
> > > +                              <K1_PADCONF(69, 2)>;
> > > +
> > > +                     bias-pull-up = <0>;
> > > +                     drive-strength = <32>;
> > > +             };
> > > +     };
> > > +};
> > > diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi
> > > b/arch/riscv/boot/dts/spacemit/k1.dtsi
> > > index 0777bf9e01183..a2d5f7d4a942a 100644
> > > --- a/arch/riscv/boot/dts/spacemit/k1.dtsi
> > > +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
> > > @@ -416,6 +416,11 @@ uart9: serial@d4017800 {
> > >                       status = "disabled";
> > >               };
> > >
> > > +             pinctrl: pinctrl@d401e000 {
> > > +                     compatible = "spacemit,k1-pinctrl";
> > > +                     reg = <0x0 0xd401e000 0x0 0x400>;
> > > +             };
> > > +
> > >               plic: interrupt-controller@e0000000 {
> > >                       compatible = "spacemit,k1-plic", "sifive,plic-1.0.0";
> > >                       reg = <0x0 0xe0000000 0x0 0x4000000>;
> > >
> > > --
> > > 2.45.2
> >
> > --
> > Yixun Lan (dlan)
> > Gentoo Linux Developer
> > GPG Key ID AABEFD55
diff mbox series

Patch

diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts 
b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
index 023274189b492..bc88d4de25a62 100644
--- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
@@ -4,6 +4,7 @@ 
   */

  #include "k1.dtsi"
+#include "k1-pinctrl.dtsi"

  / {
  	model = "Banana Pi BPI-F3";
@@ -15,5 +16,7 @@  chosen {
  };

  &uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_2_cfg>;
  	status = "okay";
  };
diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi 
b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
new file mode 100644
index 0000000000000..a8eac5517f857
--- /dev/null
+++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
@@ -0,0 +1,20 @@ 
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (c) 2024 Yixun Lan <dlan@gentoo.org>
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+
+#define K1_PADCONF(pin, func) (((pin) << 16) | (func))

It would be nice to have a pinfunc header like
arch/arm/boot/dts/nxp/imx/imx7ulp-pinfunc.h.
It would reference and encode the data of "3.2 Pin Multiplex" in
https://developer.spacemit.com/documentation?token=An1vwTwKaigaXRkYfwmcznTXned 
, the document you attached in the summary.

Otherwise,
Acked-by: Jesse Taube <Mr.Bossman075@gmail.com>

+
+&pinctrl {
+	uart0_2_cfg: uart0-2-cfg {
+		uart0-2-pins {
+			pinmux = <K1_PADCONF(68, 2)>,
+				 <K1_PADCONF(69, 2)>;
+
+			bias-pull-up = <0>;
+			drive-strength = <32>;
+		};
+	};
+};
diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi 
b/arch/riscv/boot/dts/spacemit/k1.dtsi
index 0777bf9e01183..a2d5f7d4a942a 100644
--- a/arch/riscv/boot/dts/spacemit/k1.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
@@ -416,6 +416,11 @@  uart9: serial@d4017800 {
  			status = "disabled";
  		};

+		pinctrl: pinctrl@d401e000 {
+			compatible = "spacemit,k1-pinctrl";
+			reg = <0x0 0xd401e000 0x0 0x400>;
+		};
+
  		plic: interrupt-controller@e0000000 {
  			compatible = "spacemit,k1-plic", "sifive,plic-1.0.0";
  			reg = <0x0 0xe0000000 0x0 0x4000000>;