| Message ID | 20210108224256.2321-18-alex.bennee@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | gdbstub, semihosting and test/tool updates (pre PR) | expand |
On Fri, Jan 8, 2021 at 3:05 PM Alex Bennée <alex.bennee@linaro.org> wrote: > > From: Kito Cheng <kito.cheng@sifive.com> > > This could made testing more easier and ARM/AArch64 has supported on > their linux user mode too, so I think it should be reasonable. > > Verified GCC testsuite with newlib/semihosting. > > Signed-off-by: Kito Cheng <kito.cheng@sifive.com> > Reviewed-by: Keith Packard <keithp@keithp.com> > Message-Id: <20210107170717.2098982-7-keithp@keithp.com> > Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > linux-user/riscv/cpu_loop.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c > index aa9e437875..9665dabb09 100644 > --- a/linux-user/riscv/cpu_loop.c > +++ b/linux-user/riscv/cpu_loop.c > @@ -23,6 +23,7 @@ > #include "qemu.h" > #include "cpu_loop-common.h" > #include "elf.h" > +#include "hw/semihosting/common-semi.h" > > void cpu_loop(CPURISCVState *env) > { > @@ -91,6 +92,10 @@ void cpu_loop(CPURISCVState *env) > sigcode = TARGET_SEGV_MAPERR; > sigaddr = env->badaddr; > break; > + case RISCV_EXCP_SEMIHOST: > + env->gpr[xA0] = do_common_semihosting(cs); > + env->pc += 4; > + break; > case EXCP_DEBUG: > gdbstep: > signum = TARGET_SIGTRAP; > -- > 2.20.1 > >
On 1/8/21 11:42 PM, Alex Bennée wrote: > From: Kito Cheng <kito.cheng@sifive.com> > > This could made testing more easier and ARM/AArch64 has supported on > their linux user mode too, so I think it should be reasonable. > > Verified GCC testsuite with newlib/semihosting. > > Signed-off-by: Kito Cheng <kito.cheng@sifive.com> > Reviewed-by: Keith Packard <keithp@keithp.com> > Message-Id: <20210107170717.2098982-7-keithp@keithp.com> > Signed-off-by: Alex Bennée <alex.bennee@linaro.org> > --- > linux-user/riscv/cpu_loop.c | 5 +++++ > 1 file changed, 5 insertions(+) Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c index aa9e437875..9665dabb09 100644 --- a/linux-user/riscv/cpu_loop.c +++ b/linux-user/riscv/cpu_loop.c @@ -23,6 +23,7 @@ #include "qemu.h" #include "cpu_loop-common.h" #include "elf.h" +#include "hw/semihosting/common-semi.h" void cpu_loop(CPURISCVState *env) { @@ -91,6 +92,10 @@ void cpu_loop(CPURISCVState *env) sigcode = TARGET_SEGV_MAPERR; sigaddr = env->badaddr; break; + case RISCV_EXCP_SEMIHOST: + env->gpr[xA0] = do_common_semihosting(cs); + env->pc += 4; + break; case EXCP_DEBUG: gdbstep: signum = TARGET_SIGTRAP;