diff mbox series

[v4,10/12] target/mips: Simplify decode_opc_mxu() ifdef'ry

Message ID 20210224185706.3293058-11-f4bug@amsat.org (mailing list archive)
State New, archived
Headers show
Series target/mips: Extract MXU code to new mxu_translate.c file | expand

Commit Message

Philippe Mathieu-Daudé Feb. 24, 2021, 6:57 p.m. UTC 
By making the prototype public and checking
'TARGET_LONG_BITS == 32' we let the compiler
elide the decode_opc_mxu() call.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/translate.h | 3 +++
 target/mips/translate.c | 6 ++----
 2 files changed, 5 insertions(+), 4 deletions(-)

Comments

Richard Henderson Feb. 24, 2021, 7:07 p.m. UTC | #1 
On 2/24/21 10:57 AM, Philippe Mathieu-Daudé wrote:
> By making the prototype public and checking
> 'TARGET_LONG_BITS == 32' we let the compiler
> elide the decode_opc_mxu() call.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  target/mips/translate.h | 3 +++
>  target/mips/translate.c | 6 ++----
>  2 files changed, 5 insertions(+), 4 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
diff mbox series

Patch

diff --git a/target/mips/translate.h b/target/mips/translate.h
index 468e29d7578..a5c49f1ee22 100644
--- a/target/mips/translate.h
+++ b/target/mips/translate.h
@@ -178,6 +178,9 @@  extern TCGv bcond;
 /* MSA */
 void msa_translate_init(void);
 
+/* MXU */
+bool decode_ase_mxu(DisasContext *ctx, uint32_t insn);
+
 /* decodetree generated */
 bool decode_isa_rel6(DisasContext *ctx, uint32_t insn);
 bool decode_ase_msa(DisasContext *ctx, uint32_t insn);
diff --git a/target/mips/translate.c b/target/mips/translate.c
index f25b1fe4d8f..84948ab9ce0 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -25779,7 +25779,7 @@  static void decode_opc_mxu__pool19(DisasContext *ctx)
 /*
  * Main MXU decoding function
  */
-static bool decode_ase_mxu(DisasContext *ctx, uint32_t insn)
+bool decode_ase_mxu(DisasContext *ctx, uint32_t insn)
 {
     uint32_t opcode = extract32(insn, 0, 6);
 
@@ -26981,8 +26981,7 @@  static bool decode_opc_legacy(CPUMIPSState *env, DisasContext *ctx)
             break;
         }
 #endif
-#if !defined(TARGET_MIPS64)
-        if (ctx->insn_flags & ASE_MXU) {
+        if (TARGET_LONG_BITS == 32 && (ctx->insn_flags & ASE_MXU)) {
             if (MASK_SPECIAL2(ctx->opcode) == OPC_MUL) {
                 gen_arith(ctx, OPC_MUL, rd, rs, rt);
             } else {
@@ -26990,7 +26989,6 @@  static bool decode_opc_legacy(CPUMIPSState *env, DisasContext *ctx)
             }
             break;
         }
-#endif
         decode_opc_special2_legacy(env, ctx);
         break;
     case OPC_SPECIAL3: