Message ID | 6bc077e5ae4a9512c8adf81ae194718f2f17c402.1612836645.git.alistair.francis@wdc.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v1,1/1] MAINTAINERS: Add a SiFIve machine section | expand |
On Tue, Feb 9, 2021 at 10:11 AM Alistair Francis <alistair.francis@wdc.com> wrote: nits: SiFIve => SiFive in the title > > Signed-off-by: Alistair Francis <alistair.francis@wdc.com> > Acked-by: Bin Meng <bin.meng@windriver.com> > --- > MAINTAINERS | 9 +++++++++ > 1 file changed, 9 insertions(+) > Regards, Bin
"SiFive", not "SiFIve", in the subject. On Mon, 08 Feb 2021 18:11:27 PST (-0800), Alistair Francis wrote: > Signed-off-by: Alistair Francis <alistair.francis@wdc.com> > Acked-by: Bin Meng <bin.meng@windriver.com> > --- > MAINTAINERS | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/MAINTAINERS b/MAINTAINERS > index 8d8b0bf966..c347d49bd2 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -1359,6 +1359,15 @@ F: include/hw/misc/mchp_pfsoc_dmc.h > F: include/hw/misc/mchp_pfsoc_ioscb.h > F: include/hw/misc/mchp_pfsoc_sysreg.h > > +SiFive Machines > +M: Alistair Francis <Alistair.Francis@wdc.com> > +M: Bin Meng <bin.meng@windriver.com> > +M: Palmer Dabbelt <palmer@dabbelt.com> > +L: qemu-riscv@nongnu.org > +S: Supported > +F: hw/*/*sifive*.c > +F: include/hw/*/*sifive*.h > + > RX Machines > ----------- > rx-gdbsim Aside from that Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Thanks!
On 2/9/21 3:14 AM, Bin Meng wrote: > On Tue, Feb 9, 2021 at 10:11 AM Alistair Francis > <alistair.francis@wdc.com> wrote: > > nits: SiFIve => SiFive in the title Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
On Mon, Feb 8, 2021 at 6:11 PM Alistair Francis <alistair.francis@wdc.com> wrote: > > Signed-off-by: Alistair Francis <alistair.francis@wdc.com> > Acked-by: Bin Meng <bin.meng@windriver.com> Thanks! Applied to riscv-to-apply.next with the title fixed. Alistair > --- > MAINTAINERS | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/MAINTAINERS b/MAINTAINERS > index 8d8b0bf966..c347d49bd2 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -1359,6 +1359,15 @@ F: include/hw/misc/mchp_pfsoc_dmc.h > F: include/hw/misc/mchp_pfsoc_ioscb.h > F: include/hw/misc/mchp_pfsoc_sysreg.h > > +SiFive Machines > +M: Alistair Francis <Alistair.Francis@wdc.com> > +M: Bin Meng <bin.meng@windriver.com> > +M: Palmer Dabbelt <palmer@dabbelt.com> > +L: qemu-riscv@nongnu.org > +S: Supported > +F: hw/*/*sifive*.c > +F: include/hw/*/*sifive*.h > + > RX Machines > ----------- > rx-gdbsim > -- > 2.30.0 >
diff --git a/MAINTAINERS b/MAINTAINERS index 8d8b0bf966..c347d49bd2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1359,6 +1359,15 @@ F: include/hw/misc/mchp_pfsoc_dmc.h F: include/hw/misc/mchp_pfsoc_ioscb.h F: include/hw/misc/mchp_pfsoc_sysreg.h +SiFive Machines +M: Alistair Francis <Alistair.Francis@wdc.com> +M: Bin Meng <bin.meng@windriver.com> +M: Palmer Dabbelt <palmer@dabbelt.com> +L: qemu-riscv@nongnu.org +S: Supported +F: hw/*/*sifive*.c +F: include/hw/*/*sifive*.h + RX Machines ----------- rx-gdbsim