| Message ID | 20230113052914.3845596-13-Penny.Zheng@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | xen/arm: Add Armv8-R64 MPU support to Xen - Part#1 | expand |
Hi Penny, On 13/01/2023 05:28, Penny Zheng wrote: > CAUTION: This message has originated from an External Source. Please use proper judgment and caution when opening attachments, clicking links, or responding to this email. > > > We need a new helper for Xen to enable MPU in boot-time. > The new helper is semantically consistent with the original enable_mmu. > > If the Background region is enabled, then the MPU uses the default memory > map as the Background region for generating the memory > attributes when MPU is disabled. > Since the default memory map of the Armv8-R AArch64 architecture is > IMPLEMENTATION DEFINED, we always turn off the Background region. > > In this patch, we also introduce a neutral name enable_mm for > Xen to enable MMU/MPU. This can help us to keep one code flow > in head.S > > Signed-off-by: Penny Zheng <penny.zheng@arm.com> > Signed-off-by: Wei Chen <wei.chen@arm.com> > --- > xen/arch/arm/arm64/head.S | 5 +++-- > xen/arch/arm/arm64/head_mmu.S | 4 ++-- > xen/arch/arm/arm64/head_mpu.S | 19 +++++++++++++++++++ > 3 files changed, 24 insertions(+), 4 deletions(-) > > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > index 145e3d53dc..7f3f973468 100644 > --- a/xen/arch/arm/arm64/head.S > +++ b/xen/arch/arm/arm64/head.S > @@ -258,7 +258,8 @@ real_start_efi: > * and memory regions for MPU systems. > */ > bl prepare_early_mappings > - bl enable_mmu > + /* Turn on MMU or MPU */ > + bl enable_mm > > /* We are still in the 1:1 mapping. Jump to the runtime Virtual Address. */ > ldr x0, =primary_switched > @@ -316,7 +317,7 @@ GLOBAL(init_secondary) > bl check_cpu_mode > bl cpu_init > bl prepare_early_mappings > - bl enable_mmu > + bl enable_mm > > /* We are still in the 1:1 mapping. Jump to the runtime Virtual Address. */ > ldr x0, =secondary_switched > diff --git a/xen/arch/arm/arm64/head_mmu.S b/xen/arch/arm/arm64/head_mmu.S > index 2346f755df..b59c40495f 100644 > --- a/xen/arch/arm/arm64/head_mmu.S > +++ b/xen/arch/arm/arm64/head_mmu.S > @@ -217,7 +217,7 @@ ENDPROC(prepare_early_mappings) > * > * Clobbers x0 - x3 > */ > -ENTRY(enable_mmu) > +ENTRY(enable_mm) > PRINT("- Turning on paging -\r\n") > > /* > @@ -239,7 +239,7 @@ ENTRY(enable_mmu) > msr SCTLR_EL2, x0 /* now paging is enabled */ > isb /* Now, flush the icache */ > ret > -ENDPROC(enable_mmu) > +ENDPROC(enable_mm) > > /* > * Remove the 1:1 map from the page-tables. It is not easy to keep track > diff --git a/xen/arch/arm/arm64/head_mpu.S b/xen/arch/arm/arm64/head_mpu.S > index 0b97ce4646..e2ac69b0cc 100644 > --- a/xen/arch/arm/arm64/head_mpu.S > +++ b/xen/arch/arm/arm64/head_mpu.S > @@ -315,6 +315,25 @@ ENDPROC(prepare_early_mappings) > > GLOBAL(_end_boot) > > +/* > + * Enable EL2 MPU and data cache > + * If the Background region is enabled, then the MPU uses the default memory > + * map as the Background region for generating the memory > + * attributes when MPU is disabled. > + * Since the default memory map of the Armv8-R AArch64 architecture is > + * IMPLEMENTATION DEFINED, we intend to turn off the Background region here. > + */ > +ENTRY(enable_mm) > + mrs x0, SCTLR_EL2 > + orr x0, x0, #SCTLR_Axx_ELx_M /* Enable MPU */ > + orr x0, x0, #SCTLR_Axx_ELx_C /* Enable D-cache */ > + orr x0, x0, #SCTLR_Axx_ELx_WXN /* Enable WXN */ > + dsb sy > + msr SCTLR_EL2, x0 > + isb > + ret > +ENDPROC(enable_mm) Can this be renamed to enable_mpu or enable_mpu_and_cache() ? Can we also have the corresponding disable function in this patch ? Also (compared with "[PATCH v6 10/11] xen/arm64: introduce helpers for MPU enable/disable"), I see that you have added #SCTLR_Axx_ELx_WXN. What is the reason for this ? - Ayan > + > /* > * Local variables: > * mode: ASM > -- > 2.25.1 > >
Hi Penny, On 13/01/2023 05:28, Penny Zheng wrote: > We need a new helper for Xen to enable MPU in boot-time. > The new helper is semantically consistent with the original enable_mmu. > > If the Background region is enabled, then the MPU uses the default memory > map as the Background region for generating the memory > attributes when MPU is disabled. > Since the default memory map of the Armv8-R AArch64 architecture is > IMPLEMENTATION DEFINED, we always turn off the Background region. You are saying this. But I don't see any code below clearing SCTLR_EL2.BR. Can you clarify? > > In this patch, we also introduce a neutral name enable_mm for > Xen to enable MMU/MPU. This can help us to keep one code flow > in head.S NIT: Missing full stop. > > Signed-off-by: Penny Zheng <penny.zheng@arm.com> > Signed-off-by: Wei Chen <wei.chen@arm.com> > --- > xen/arch/arm/arm64/head.S | 5 +++-- > xen/arch/arm/arm64/head_mmu.S | 4 ++-- > xen/arch/arm/arm64/head_mpu.S | 19 +++++++++++++++++++ > 3 files changed, 24 insertions(+), 4 deletions(-) > > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > index 145e3d53dc..7f3f973468 100644 > --- a/xen/arch/arm/arm64/head.S > +++ b/xen/arch/arm/arm64/head.S > @@ -258,7 +258,8 @@ real_start_efi: > * and memory regions for MPU systems. > */ > bl prepare_early_mappings > - bl enable_mmu > + /* Turn on MMU or MPU */ > + bl enable_mm > > /* We are still in the 1:1 mapping. Jump to the runtime Virtual Address. */ > ldr x0, =primary_switched > @@ -316,7 +317,7 @@ GLOBAL(init_secondary) > bl check_cpu_mode > bl cpu_init > bl prepare_early_mappings > - bl enable_mmu > + bl enable_mm > > /* We are still in the 1:1 mapping. Jump to the runtime Virtual Address. */ > ldr x0, =secondary_switched > diff --git a/xen/arch/arm/arm64/head_mmu.S b/xen/arch/arm/arm64/head_mmu.S > index 2346f755df..b59c40495f 100644 > --- a/xen/arch/arm/arm64/head_mmu.S > +++ b/xen/arch/arm/arm64/head_mmu.S > @@ -217,7 +217,7 @@ ENDPROC(prepare_early_mappings) > * > * Clobbers x0 - x3 > */ > -ENTRY(enable_mmu) > +ENTRY(enable_mm) > PRINT("- Turning on paging -\r\n") > > /* > @@ -239,7 +239,7 @@ ENTRY(enable_mmu) > msr SCTLR_EL2, x0 /* now paging is enabled */ > isb /* Now, flush the icache */ > ret > -ENDPROC(enable_mmu) > +ENDPROC(enable_mm) > > /* > * Remove the 1:1 map from the page-tables. It is not easy to keep track > diff --git a/xen/arch/arm/arm64/head_mpu.S b/xen/arch/arm/arm64/head_mpu.S > index 0b97ce4646..e2ac69b0cc 100644 > --- a/xen/arch/arm/arm64/head_mpu.S > +++ b/xen/arch/arm/arm64/head_mpu.S > @@ -315,6 +315,25 @@ ENDPROC(prepare_early_mappings) > > GLOBAL(_end_boot) > > +/* > + * Enable EL2 MPU and data cache > + * If the Background region is enabled, then the MPU uses the default memory > + * map as the Background region for generating the memory > + * attributes when MPU is disabled. > + * Since the default memory map of the Armv8-R AArch64 architecture is > + * IMPLEMENTATION DEFINED, we intend to turn off the Background region here. Please document which register you are clobberring. See the MMU code for examples how to do you. > + */ > +ENTRY(enable_mm) > + mrs x0, SCTLR_EL2 > + orr x0, x0, #SCTLR_Axx_ELx_M /* Enable MPU */ > + orr x0, x0, #SCTLR_Axx_ELx_C /* Enable D-cache */ > + orr x0, x0, #SCTLR_Axx_ELx_WXN /* Enable WXN */ > + dsb sy Please document the reason of each dsb. In this case, it is not entirely clear what this is for. > + msr SCTLR_EL2, x0 > + isb Likely for isb. > + ret > +ENDPROC(enable_mm) > + Cheers,
diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 145e3d53dc..7f3f973468 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -258,7 +258,8 @@ real_start_efi: * and memory regions for MPU systems. */ bl prepare_early_mappings - bl enable_mmu + /* Turn on MMU or MPU */ + bl enable_mm /* We are still in the 1:1 mapping. Jump to the runtime Virtual Address. */ ldr x0, =primary_switched @@ -316,7 +317,7 @@ GLOBAL(init_secondary) bl check_cpu_mode bl cpu_init bl prepare_early_mappings - bl enable_mmu + bl enable_mm /* We are still in the 1:1 mapping. Jump to the runtime Virtual Address. */ ldr x0, =secondary_switched diff --git a/xen/arch/arm/arm64/head_mmu.S b/xen/arch/arm/arm64/head_mmu.S index 2346f755df..b59c40495f 100644 --- a/xen/arch/arm/arm64/head_mmu.S +++ b/xen/arch/arm/arm64/head_mmu.S @@ -217,7 +217,7 @@ ENDPROC(prepare_early_mappings) * * Clobbers x0 - x3 */ -ENTRY(enable_mmu) +ENTRY(enable_mm) PRINT("- Turning on paging -\r\n") /* @@ -239,7 +239,7 @@ ENTRY(enable_mmu) msr SCTLR_EL2, x0 /* now paging is enabled */ isb /* Now, flush the icache */ ret -ENDPROC(enable_mmu) +ENDPROC(enable_mm) /* * Remove the 1:1 map from the page-tables. It is not easy to keep track diff --git a/xen/arch/arm/arm64/head_mpu.S b/xen/arch/arm/arm64/head_mpu.S index 0b97ce4646..e2ac69b0cc 100644 --- a/xen/arch/arm/arm64/head_mpu.S +++ b/xen/arch/arm/arm64/head_mpu.S @@ -315,6 +315,25 @@ ENDPROC(prepare_early_mappings) GLOBAL(_end_boot) +/* + * Enable EL2 MPU and data cache + * If the Background region is enabled, then the MPU uses the default memory + * map as the Background region for generating the memory + * attributes when MPU is disabled. + * Since the default memory map of the Armv8-R AArch64 architecture is + * IMPLEMENTATION DEFINED, we intend to turn off the Background region here. + */ +ENTRY(enable_mm) + mrs x0, SCTLR_EL2 + orr x0, x0, #SCTLR_Axx_ELx_M /* Enable MPU */ + orr x0, x0, #SCTLR_Axx_ELx_C /* Enable D-cache */ + orr x0, x0, #SCTLR_Axx_ELx_WXN /* Enable WXN */ + dsb sy + msr SCTLR_EL2, x0 + isb + ret +ENDPROC(enable_mm) + /* * Local variables: * mode: ASM