diff mbox series

[35/37] drm/i915/dg1: Load DMC

Message ID 20200521003803.18936-36-lucas.demarchi@intel.com (mailing list archive)
State New, archived
Headers show
Series Introduce DG1 | expand

Commit Message

Lucas De Marchi May 21, 2020, 12:38 a.m. UTC 
From: Matt Atwood <matthew.s.atwood@intel.com>

Add support to load DMC v2.0.2 on DG1

While we're at it, tweak the TGL and RKL firmware size definition to
follow the convention used in previous platforms. Remove obsolete
commenting.

Bpec: 49230

Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/display/intel_csr.c | 19 +++++++++++++------
 1 file changed, 13 insertions(+), 6 deletions(-)

Comments

Souza, Jose May 26, 2020, 5:42 p.m. UTC | #1 
On Wed, 2020-05-20 at 17:38 -0700, Lucas De Marchi wrote:
> From: Matt Atwood <matthew.s.atwood@intel.com>
> 
> Add support to load DMC v2.0.2 on DG1
> 
> While we're at it, tweak the TGL and RKL firmware size definition to
> follow the convention used in previous platforms. Remove obsolete
> commenting.
> 
> Bpec: 49230
> 
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_csr.c | 19 +++++++++++++------
>  1 file changed, 13 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_csr.c b/drivers/gpu/drm/i915/display/intel_csr.c
> index 319932b03e88..1f05876620fe 100644
> --- a/drivers/gpu/drm/i915/display/intel_csr.c
> +++ b/drivers/gpu/drm/i915/display/intel_csr.c
> @@ -38,15 +38,19 @@
>   * low-power state and comes back to normal.
>   */
>  
> -#define GEN12_CSR_MAX_FW_SIZE		ICL_CSR_MAX_FW_SIZE

Why GEN12_CSR_MAX_FW_SIZE was replaced by platform size if the size is still the same for all?

> +#define DG1_CSR_PATH			"i915/dg1_dmc_ver2_02.bin"
> +#define DG1_CSR_VERSION_REQUIRED	CSR_VERSION(2, 2)
> +#define DG1_CSR_MAX_FW_SIZE		ICL_CSR_MAX_FW_SIZE
> +MODULE_FIRMWARE(DG1_CSR_PATH);
>  
>  #define RKL_CSR_PATH			"i915/rkl_dmc_ver2_01.bin"
>  #define RKL_CSR_VERSION_REQUIRED	CSR_VERSION(2, 1)
> +#define RKL_CSR_MAX_FW_SIZE		ICL_CSR_MAX_FW_SIZE
>  MODULE_FIRMWARE(RKL_CSR_PATH);
>  
>  #define TGL_CSR_PATH			"i915/tgl_dmc_ver2_06.bin"
>  #define TGL_CSR_VERSION_REQUIRED	CSR_VERSION(2, 6)
> -#define TGL_CSR_MAX_FW_SIZE		0x6000
> +#define TGL_CSR_MAX_FW_SIZE		ICL_CSR_MAX_FW_SIZE
>  MODULE_FIRMWARE(TGL_CSR_PATH);
>  
>  #define ICL_CSR_PATH			"i915/icl_dmc_ver1_09.bin"
> @@ -686,15 +690,18 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
>  	 */
>  	intel_csr_runtime_pm_get(dev_priv);
>  
> -	if (IS_ROCKETLAKE(dev_priv)) {
> +	if (IS_DG1(dev_priv)) {
> +		csr->fw_path = DG1_CSR_PATH;
> +		csr->required_version = DG1_CSR_VERSION_REQUIRED;
> +		csr->max_fw_size = DG1_CSR_MAX_FW_SIZE;
> +	} else if (IS_ROCKETLAKE(dev_priv)) {
>  		csr->fw_path = RKL_CSR_PATH;
>  		csr->required_version = RKL_CSR_VERSION_REQUIRED;
> -		csr->max_fw_size = GEN12_CSR_MAX_FW_SIZE;
> +		csr->max_fw_size = RKL_CSR_MAX_FW_SIZE;
>  	} else if (INTEL_GEN(dev_priv) >= 12) {
>  		csr->fw_path = TGL_CSR_PATH;
>  		csr->required_version = TGL_CSR_VERSION_REQUIRED;
> -		/* Allow to load fw via parameter using the last known size */
> -		csr->max_fw_size = GEN12_CSR_MAX_FW_SIZE;
> +		csr->max_fw_size = TGL_CSR_MAX_FW_SIZE;
>  	} else if (IS_GEN(dev_priv, 11)) {
>  		csr->fw_path = ICL_CSR_PATH;
>  		csr->required_version = ICL_CSR_VERSION_REQUIRED;
Lucas De Marchi May 26, 2020, 5:49 p.m. UTC | #2 
On Tue, May 26, 2020 at 10:42:30AM -0700, Jose Souza wrote:
>On Wed, 2020-05-20 at 17:38 -0700, Lucas De Marchi wrote:
>> From: Matt Atwood <matthew.s.atwood@intel.com>
>>
>> Add support to load DMC v2.0.2 on DG1
>>
>> While we're at it, tweak the TGL and RKL firmware size definition to
>> follow the convention used in previous platforms. Remove obsolete
>> commenting.
>>
>> Bpec: 49230
>>
>> Cc: Matt Roper <matthew.d.roper@intel.com>
>> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_csr.c | 19 +++++++++++++------
>>  1 file changed, 13 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_csr.c b/drivers/gpu/drm/i915/display/intel_csr.c
>> index 319932b03e88..1f05876620fe 100644
>> --- a/drivers/gpu/drm/i915/display/intel_csr.c
>> +++ b/drivers/gpu/drm/i915/display/intel_csr.c
>> @@ -38,15 +38,19 @@
>>   * low-power state and comes back to normal.
>>   */
>>
>> -#define GEN12_CSR_MAX_FW_SIZE		ICL_CSR_MAX_FW_SIZE
>
>Why GEN12_CSR_MAX_FW_SIZE was replaced by platform size if the size is still the same for all?

Previous platforms used it per platform rather than gen, so I guess
this is what Matt Atwood intended to do and wrote in the last paragraph
in the commit message.

I think we could go either way... no strong opinion on one vs the other.

Lucas De Marchi

>
>> +#define DG1_CSR_PATH			"i915/dg1_dmc_ver2_02.bin"
>> +#define DG1_CSR_VERSION_REQUIRED	CSR_VERSION(2, 2)
>> +#define DG1_CSR_MAX_FW_SIZE		ICL_CSR_MAX_FW_SIZE
>> +MODULE_FIRMWARE(DG1_CSR_PATH);
>>
>>  #define RKL_CSR_PATH			"i915/rkl_dmc_ver2_01.bin"
>>  #define RKL_CSR_VERSION_REQUIRED	CSR_VERSION(2, 1)
>> +#define RKL_CSR_MAX_FW_SIZE		ICL_CSR_MAX_FW_SIZE
>>  MODULE_FIRMWARE(RKL_CSR_PATH);
>>
>>  #define TGL_CSR_PATH			"i915/tgl_dmc_ver2_06.bin"
>>  #define TGL_CSR_VERSION_REQUIRED	CSR_VERSION(2, 6)
>> -#define TGL_CSR_MAX_FW_SIZE		0x6000
>> +#define TGL_CSR_MAX_FW_SIZE		ICL_CSR_MAX_FW_SIZE
>>  MODULE_FIRMWARE(TGL_CSR_PATH);
>>
>>  #define ICL_CSR_PATH			"i915/icl_dmc_ver1_09.bin"
>> @@ -686,15 +690,18 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
>>  	 */
>>  	intel_csr_runtime_pm_get(dev_priv);
>>
>> -	if (IS_ROCKETLAKE(dev_priv)) {
>> +	if (IS_DG1(dev_priv)) {
>> +		csr->fw_path = DG1_CSR_PATH;
>> +		csr->required_version = DG1_CSR_VERSION_REQUIRED;
>> +		csr->max_fw_size = DG1_CSR_MAX_FW_SIZE;
>> +	} else if (IS_ROCKETLAKE(dev_priv)) {
>>  		csr->fw_path = RKL_CSR_PATH;
>>  		csr->required_version = RKL_CSR_VERSION_REQUIRED;
>> -		csr->max_fw_size = GEN12_CSR_MAX_FW_SIZE;
>> +		csr->max_fw_size = RKL_CSR_MAX_FW_SIZE;
>>  	} else if (INTEL_GEN(dev_priv) >= 12) {
>>  		csr->fw_path = TGL_CSR_PATH;
>>  		csr->required_version = TGL_CSR_VERSION_REQUIRED;
>> -		/* Allow to load fw via parameter using the last known size */
>> -		csr->max_fw_size = GEN12_CSR_MAX_FW_SIZE;
>> +		csr->max_fw_size = TGL_CSR_MAX_FW_SIZE;
>>  	} else if (IS_GEN(dev_priv, 11)) {
>>  		csr->fw_path = ICL_CSR_PATH;
>>  		csr->required_version = ICL_CSR_VERSION_REQUIRED;
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_csr.c b/drivers/gpu/drm/i915/display/intel_csr.c
index 319932b03e88..1f05876620fe 100644
--- a/drivers/gpu/drm/i915/display/intel_csr.c
+++ b/drivers/gpu/drm/i915/display/intel_csr.c
@@ -38,15 +38,19 @@ 
  * low-power state and comes back to normal.
  */
 
-#define GEN12_CSR_MAX_FW_SIZE		ICL_CSR_MAX_FW_SIZE
+#define DG1_CSR_PATH			"i915/dg1_dmc_ver2_02.bin"
+#define DG1_CSR_VERSION_REQUIRED	CSR_VERSION(2, 2)
+#define DG1_CSR_MAX_FW_SIZE		ICL_CSR_MAX_FW_SIZE
+MODULE_FIRMWARE(DG1_CSR_PATH);
 
 #define RKL_CSR_PATH			"i915/rkl_dmc_ver2_01.bin"
 #define RKL_CSR_VERSION_REQUIRED	CSR_VERSION(2, 1)
+#define RKL_CSR_MAX_FW_SIZE		ICL_CSR_MAX_FW_SIZE
 MODULE_FIRMWARE(RKL_CSR_PATH);
 
 #define TGL_CSR_PATH			"i915/tgl_dmc_ver2_06.bin"
 #define TGL_CSR_VERSION_REQUIRED	CSR_VERSION(2, 6)
-#define TGL_CSR_MAX_FW_SIZE		0x6000
+#define TGL_CSR_MAX_FW_SIZE		ICL_CSR_MAX_FW_SIZE
 MODULE_FIRMWARE(TGL_CSR_PATH);
 
 #define ICL_CSR_PATH			"i915/icl_dmc_ver1_09.bin"
@@ -686,15 +690,18 @@  void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
 	 */
 	intel_csr_runtime_pm_get(dev_priv);
 
-	if (IS_ROCKETLAKE(dev_priv)) {
+	if (IS_DG1(dev_priv)) {
+		csr->fw_path = DG1_CSR_PATH;
+		csr->required_version = DG1_CSR_VERSION_REQUIRED;
+		csr->max_fw_size = DG1_CSR_MAX_FW_SIZE;
+	} else if (IS_ROCKETLAKE(dev_priv)) {
 		csr->fw_path = RKL_CSR_PATH;
 		csr->required_version = RKL_CSR_VERSION_REQUIRED;
-		csr->max_fw_size = GEN12_CSR_MAX_FW_SIZE;
+		csr->max_fw_size = RKL_CSR_MAX_FW_SIZE;
 	} else if (INTEL_GEN(dev_priv) >= 12) {
 		csr->fw_path = TGL_CSR_PATH;
 		csr->required_version = TGL_CSR_VERSION_REQUIRED;
-		/* Allow to load fw via parameter using the last known size */
-		csr->max_fw_size = GEN12_CSR_MAX_FW_SIZE;
+		csr->max_fw_size = TGL_CSR_MAX_FW_SIZE;
 	} else if (IS_GEN(dev_priv, 11)) {
 		csr->fw_path = ICL_CSR_PATH;
 		csr->required_version = ICL_CSR_VERSION_REQUIRED;