| Message ID | 20230323142035.1432621-16-imre.deak@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/tc: Align the ADLP TypeC sequences with bspec | expand |
> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre > Deak > Sent: Thursday, March 23, 2023 4:20 PM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH 15/29] drm/i915/tc: Check TC mode instead of the > VBT legacy flag > > After the previous patch the TC mode in the connect/disconnect functions is > always in sync with the VBT legacy port flag, so for consistency with the rest of > the function check the TC mode instead of the VBT flag. > Reviewed-by: Mika Kahola <mika.kahola@intel.com> > Signed-off-by: Imre Deak <imre.deak@intel.com> > --- > drivers/gpu/drm/i915/display/intel_tc.c | 15 +++++++-------- > 1 file changed, 7 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c > b/drivers/gpu/drm/i915/display/intel_tc.c > index e61daa40356b5..e8bd54d1582bc 100644 > --- a/drivers/gpu/drm/i915/display/intel_tc.c > +++ b/drivers/gpu/drm/i915/display/intel_tc.c > @@ -449,7 +449,7 @@ static bool > tc_phy_verify_legacy_or_dp_alt_mode(struct intel_tc_port *tc, > int max_lanes; > > max_lanes = intel_tc_port_fia_max_lane_count(dig_port); > - if (tc->legacy_port) { > + if (tc->mode == TC_PORT_LEGACY) { > drm_WARN_ON(&i915->drm, max_lanes != 4); > return true; > } > @@ -485,16 +485,15 @@ static bool icl_tc_phy_connect(struct intel_tc_port > *tc, > if (tc->mode == TC_PORT_TBT_ALT) > return true; > > - if (!tc_phy_is_ready(tc) && > - !drm_WARN_ON(&i915->drm, tc->legacy_port)) { > - drm_dbg_kms(&i915->drm, "Port %s: PHY not ready\n", > - tc->port_name); > + if ((!tc_phy_is_ready(tc) || > + !tc_phy_take_ownership(tc, true)) && > + !drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_LEGACY)) { > + drm_dbg_kms(&i915->drm, "Port %s: can't take PHY ownership > (ready %s)\n", > + tc->port_name, > + str_yes_no(tc_phy_is_ready(tc))); > return false; > } > > - if (!tc_phy_take_ownership(tc, true) && > - !drm_WARN_ON(&i915->drm, tc->legacy_port)) > - return false; > > if (!tc_phy_verify_legacy_or_dp_alt_mode(tc, required_lanes)) > goto out_release_phy; > -- > 2.37.1
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index e61daa40356b5..e8bd54d1582bc 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -449,7 +449,7 @@ static bool tc_phy_verify_legacy_or_dp_alt_mode(struct intel_tc_port *tc, int max_lanes; max_lanes = intel_tc_port_fia_max_lane_count(dig_port); - if (tc->legacy_port) { + if (tc->mode == TC_PORT_LEGACY) { drm_WARN_ON(&i915->drm, max_lanes != 4); return true; } @@ -485,16 +485,15 @@ static bool icl_tc_phy_connect(struct intel_tc_port *tc, if (tc->mode == TC_PORT_TBT_ALT) return true; - if (!tc_phy_is_ready(tc) && - !drm_WARN_ON(&i915->drm, tc->legacy_port)) { - drm_dbg_kms(&i915->drm, "Port %s: PHY not ready\n", - tc->port_name); + if ((!tc_phy_is_ready(tc) || + !tc_phy_take_ownership(tc, true)) && + !drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_LEGACY)) { + drm_dbg_kms(&i915->drm, "Port %s: can't take PHY ownership (ready %s)\n", + tc->port_name, + str_yes_no(tc_phy_is_ready(tc))); return false; } - if (!tc_phy_take_ownership(tc, true) && - !drm_WARN_ON(&i915->drm, tc->legacy_port)) - return false; if (!tc_phy_verify_legacy_or_dp_alt_mode(tc, required_lanes)) goto out_release_phy;
After the previous patch the TC mode in the connect/disconnect functions is always in sync with the VBT legacy port flag, so for consistency with the rest of the function check the TC mode instead of the VBT flag. Signed-off-by: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/i915/display/intel_tc.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-)