| Message ID | 20230823170740.1180212-23-lucas.demarchi@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Enable Lunar Lake display | expand |
> -----Original Message----- > From: De Marchi, Lucas <lucas.demarchi@intel.com> > Sent: Wednesday, August 23, 2023 10:07 AM > To: intel-xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org > Cc: Roper, Matthew D <matthew.d.roper@intel.com>; Srivatsa, Anusha > <anusha.srivatsa@intel.com>; De Marchi, Lucas <lucas.demarchi@intel.com> > Subject: [PATCH 22/42] drm/i915/xe2lpd: Add DC state support > > From: Matt Roper <matthew.d.roper@intel.com> > > Xe2_LPD supports DC5, DC6, and DC9 (DC3CO no longer exists). The overall > programming and requirements to enter DC states are similar to those of > Xe_LPD+ although AUX transactions do not require DC5/DC6 exit as they did > previously. > > Bspec: 68851, 68857, 68886, 69115 > Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> > Signed-off-by: Matt Roper <matthew.d.roper@intel.com> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > .../drm/i915/display/intel_display_power.c | 4 +++- > .../i915/display/intel_display_power_map.c | 19 +++++++++++++++++++ > 2 files changed, 22 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c > b/drivers/gpu/drm/i915/display/intel_display_power.c > index 7e2059abae9a..508a3225d9f0 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c > @@ -944,7 +944,9 @@ static u32 get_allowed_dc_mask(const struct > drm_i915_private *dev_priv, > if (!HAS_DISPLAY(dev_priv)) > return 0; > > - if (IS_DG2(dev_priv)) > + if (DISPLAY_VER(dev_priv) >= 20) > + max_dc = 2; > + else if (IS_DG2(dev_priv)) > max_dc = 1; > else if (IS_DG1(dev_priv)) > max_dc = 3; > diff --git a/drivers/gpu/drm/i915/display/intel_display_power_map.c > b/drivers/gpu/drm/i915/display/intel_display_power_map.c > index cef3b313c9f5..d74a742437c3 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power_map.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power_map.c > @@ -1570,9 +1570,28 @@ static const struct i915_power_well_desc > xe2lpd_power_wells_pica[] = { > }, > }; > > +I915_DECL_PW_DOMAINS(xe2lpd_pwdoms_dc_off, > + POWER_DOMAIN_DC_OFF, > + XELPD_PW_C_POWER_DOMAINS, > + XELPD_PW_D_POWER_DOMAINS, > + POWER_DOMAIN_AUDIO_MMIO, > + POWER_DOMAIN_MODESET, > + POWER_DOMAIN_INIT); > + > +static const struct i915_power_well_desc xe2lpd_power_wells_dcoff[] = { > + { > + .instances = &I915_PW_INSTANCES( > + I915_PW("DC_off", &xe2lpd_pwdoms_dc_off, > + .id = SKL_DISP_DC_OFF), > + ), > + .ops = &gen9_dc_off_power_well_ops, > + }, > +}; > + > static const struct i915_power_well_desc_list xe2lpd_power_wells[] = { > I915_PW_DESCRIPTORS(i9xx_power_wells_always_on), > I915_PW_DESCRIPTORS(icl_power_wells_pw_1), > + I915_PW_DESCRIPTORS(xe2lpd_power_wells_dcoff), > I915_PW_DESCRIPTORS(xelpdp_power_wells_main), > I915_PW_DESCRIPTORS(xe2lpd_power_wells_pica), > }; > -- > 2.40.1
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index 7e2059abae9a..508a3225d9f0 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -944,7 +944,9 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv, if (!HAS_DISPLAY(dev_priv)) return 0; - if (IS_DG2(dev_priv)) + if (DISPLAY_VER(dev_priv) >= 20) + max_dc = 2; + else if (IS_DG2(dev_priv)) max_dc = 1; else if (IS_DG1(dev_priv)) max_dc = 3; diff --git a/drivers/gpu/drm/i915/display/intel_display_power_map.c b/drivers/gpu/drm/i915/display/intel_display_power_map.c index cef3b313c9f5..d74a742437c3 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power_map.c +++ b/drivers/gpu/drm/i915/display/intel_display_power_map.c @@ -1570,9 +1570,28 @@ static const struct i915_power_well_desc xe2lpd_power_wells_pica[] = { }, }; +I915_DECL_PW_DOMAINS(xe2lpd_pwdoms_dc_off, + POWER_DOMAIN_DC_OFF, + XELPD_PW_C_POWER_DOMAINS, + XELPD_PW_D_POWER_DOMAINS, + POWER_DOMAIN_AUDIO_MMIO, + POWER_DOMAIN_MODESET, + POWER_DOMAIN_INIT); + +static const struct i915_power_well_desc xe2lpd_power_wells_dcoff[] = { + { + .instances = &I915_PW_INSTANCES( + I915_PW("DC_off", &xe2lpd_pwdoms_dc_off, + .id = SKL_DISP_DC_OFF), + ), + .ops = &gen9_dc_off_power_well_ops, + }, +}; + static const struct i915_power_well_desc_list xe2lpd_power_wells[] = { I915_PW_DESCRIPTORS(i9xx_power_wells_always_on), I915_PW_DESCRIPTORS(icl_power_wells_pw_1), + I915_PW_DESCRIPTORS(xe2lpd_power_wells_dcoff), I915_PW_DESCRIPTORS(xelpdp_power_wells_main), I915_PW_DESCRIPTORS(xe2lpd_power_wells_pica), };