diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h index aaed9b522220..2fbead2e86d1 100644 --- a/arch/mips/include/asm/stackframe.h +++ b/arch/mips/include/asm/stackframe.h @@ -394,6 +394,7 @@ pcpyld $29, $0, $29 pcpyld $30, $0, $30 pcpyld $31, $0, $31 + mtsab $0, 0 /* Reset the funnel shift (SA) register. */ .set pop .endm #else
The shift amount (SA) register is a 64-bit special register storing the funnel shift amount[1]. It is used by the QFSRV (quadword funnel shift right variable) 256-bit multimedia instruction. This is a provisional measure until the SA register is saved/restored properly. The R5900 specific MTSAB (move byte count to shift amount register) instruction is used to reset the SA register. References: [1] "TX System RISC TX79 Core Architecture" manual, revision 2.0, Toshiba Corporation, p. B-161, https://wiki.qemu.org/File:C790.pdf Signed-off-by: Fredrik Noring <noring@nocrew.org> --- The shift amount (SA) register ought to be saved and restored properly too, along with the 128-bit GPRs, I think. --- arch/mips/include/asm/stackframe.h | 1 + 1 file changed, 1 insertion(+)