| Message ID | 20190830134515.11925-3-geert+renesas@glider.be (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | b5dea62d34042d173ba1d1887c8dd40262423d68 |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | clk: renesas: rcar-gen2/gen3: Switch to .determine_rate() | expand |
Hi Geert, Thanks for your work. On 2019-08-30 15:45:09 +0200, Geert Uytterhoeven wrote: > - Use div64_ul() instead of div_u64() if the divisor is unsigned long, > to avoid truncation to 32-bit on 64-bit platforms, > - Use div_u64() for 64-by-32 divisions. > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > --- > v2: > - New. > --- > drivers/clk/renesas/rcar-gen3-cpg.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c b/drivers/clk/renesas/rcar-gen3-cpg.c > index 043ab6ed9d550732..3480284a08308134 100644 > --- a/drivers/clk/renesas/rcar-gen3-cpg.c > +++ b/drivers/clk/renesas/rcar-gen3-cpg.c > @@ -122,10 +122,10 @@ static long cpg_z_clk_round_rate(struct clk_hw *hw, unsigned long rate, > unsigned int mult; > > prate = *parent_rate / zclk->fixed_div; > - mult = div_u64(rate * 32ULL, prate); > + mult = div64_ul(rate * 32ULL, prate); > mult = clamp(mult, 1U, 32U); > > - return (u64)prate * mult / 32; > + return div_u64((u64)prate * mult, 32); > } > > static int cpg_z_clk_set_rate(struct clk_hw *hw, unsigned long rate, > -- > 2.17.1 >
diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c b/drivers/clk/renesas/rcar-gen3-cpg.c index 043ab6ed9d550732..3480284a08308134 100644 --- a/drivers/clk/renesas/rcar-gen3-cpg.c +++ b/drivers/clk/renesas/rcar-gen3-cpg.c @@ -122,10 +122,10 @@ static long cpg_z_clk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned int mult; prate = *parent_rate / zclk->fixed_div; - mult = div_u64(rate * 32ULL, prate); + mult = div64_ul(rate * 32ULL, prate); mult = clamp(mult, 1U, 32U); - return (u64)prate * mult / 32; + return div_u64((u64)prate * mult, 32); } static int cpg_z_clk_set_rate(struct clk_hw *hw, unsigned long rate,
- Use div64_ul() instead of div_u64() if the divisor is unsigned long, to avoid truncation to 32-bit on 64-bit platforms, - Use div_u64() for 64-by-32 divisions. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- v2: - New. --- drivers/clk/renesas/rcar-gen3-cpg.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)