Show patches with: Submitter = Jisheng Zhang       |    Archived = No       |   339 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
tty: hvc: riscv_sbi: instantiate the legcay console earlier tty: hvc: riscv_sbi: instantiate the legcay console earlier - - - 13-- 2024-10-14 Jisheng Zhang New
[v2,7/7] riscv: traps: mark do_irq() as __always_inline riscv: convert bottom half of exception handling to C - - - 11-3 2024-07-20 Jisheng Zhang New
[v2,6/7] riscv: staticalize and remove asmlinkage from updated functions riscv: convert bottom half of exception handling to C - - - 11-3 2024-07-20 Jisheng Zhang New
[v2,5/7] riscv: errata: sifive: remove NOMMU handling riscv: convert bottom half of exception handling to C - - - 12-2 2024-07-20 Jisheng Zhang New
[v2,4/7] riscv: errata: remove ALT_INSN_FAULT and ALT_PAGE_FAULT riscv: convert bottom half of exception handling to C - - - 12-2 2024-07-20 Jisheng Zhang New
[v2,3/7] riscv: convert bottom half of exception handling to C riscv: convert bottom half of exception handling to C - 1 - 1112 2024-07-20 Jisheng Zhang New
[v2,2/7] riscv: traps: remove __visible annotation riscv: convert bottom half of exception handling to C - - - 12-2 2024-07-20 Jisheng Zhang New
[v2,1/7] riscv: traps: staticalize handle_break() riscv: convert bottom half of exception handling to C - - - 12-2 2024-07-20 Jisheng Zhang New
[v2] riscv: avoid Imbalance in RAS [v2] riscv: avoid Imbalance in RAS - 1 - 13-- 2024-07-20 Jisheng Zhang Accepted
[v2,2/2] serial: 8250_early: add xscale earlycon support serial: 8250: move mmp|pxa uart earlycon code and add xscale earlycon - - - 121- 2024-07-11 Jisheng Zhang Handled Elsewhere
[v2,1/2] serial: 8250: move mmp|pxa uart earlycon code serial: 8250: move mmp|pxa uart earlycon code and add xscale earlycon - - - 121- 2024-07-11 Jisheng Zhang Handled Elsewhere
[v2,2/2] riscv: select ARCH_USE_SYM_ANNOTATIONS riscv: select ARCH_USE_SYM_ANNOTATIONS - 1 - 121- 2024-07-09 Jisheng Zhang Accepted
[v2,1/2] riscv: errata: sifive: Use SYM_*() assembly macros riscv: select ARCH_USE_SYM_ANNOTATIONS - 1 - 121- 2024-07-09 Jisheng Zhang Accepted
serial: 8250: move mmp|pxa uart earlycon code and add xscale earlycon serial: 8250: move mmp|pxa uart earlycon code and add xscale earlycon - - - 121- 2024-07-06 Jisheng Zhang Superseded
serial: 8250: don't lost port's default capabilities serial: 8250: don't lost port's default capabilities - - - 13-- 2024-07-06 Jisheng Zhang Handled Elsewhere
[v2] riscv: define ILLEGAL_POINTER_VALUE for 64bit [v2] riscv: define ILLEGAL_POINTER_VALUE for 64bit - - - 13-- 2024-07-05 Jisheng Zhang Accepted
riscv: define ILLEGAL_POINTER_VALUE for 64bit riscv: define ILLEGAL_POINTER_VALUE for 64bit - - - --- 2024-07-05 Jisheng Zhang Superseded
riscv: select ARCH_USE_SYM_ANNOTATIONS riscv: select ARCH_USE_SYM_ANNOTATIONS - - - --- 2024-07-05 Jisheng Zhang Superseded
[v2] riscv: enable HAVE_ARCH_STACKLEAK [v2] riscv: enable HAVE_ARCH_STACKLEAK - 1 - 13-- 2024-06-23 Jisheng Zhang Accepted
MAINTAINERS: thead: update Maintainer MAINTAINERS: thead: update Maintainer 1 - - 13-- 2024-06-20 Jisheng Zhang Accepted
riscv: enable HAVE_ARCH_STACKLEAK riscv: enable HAVE_ARCH_STACKLEAK - - - 13-- 2024-06-17 Jisheng Zhang Superseded
[6/6] riscv: remove asmlinkage from updated functions riscv: convert bottom half of exception handling to C - - - 13-- 2024-06-16 Jisheng Zhang Superseded
[5/6] riscv: errata: sifive: remove NOMMU handling riscv: convert bottom half of exception handling to C - - - 13-- 2024-06-16 Jisheng Zhang Superseded
[4/6] riscv: errata: remove ALT_INSN_FAULT and ALT_PAGE_FAULT riscv: convert bottom half of exception handling to C - - - 13-- 2024-06-16 Jisheng Zhang Superseded
[3/6] riscv: convert bottom half of exception handling to C riscv: convert bottom half of exception handling to C - - - 121- 2024-06-16 Jisheng Zhang Superseded
[2/6] riscv: avoid corrupting the RAS riscv: convert bottom half of exception handling to C - 1 - 13-- 2024-06-16 Jisheng Zhang Superseded
[1/6] riscv: Improve exception and system call latency riscv: convert bottom half of exception handling to C - 1 - 13-- 2024-06-16 Jisheng Zhang Superseded
irqchip/riscv-intc: Remove asmlinkage irqchip/riscv-intc: Remove asmlinkage - 1 - 13-- 2024-06-14 Jisheng Zhang Accepted
[RESEND] riscv: boot: remove duplicated targets line [RESEND] riscv: boot: remove duplicated targets line - 1 - 13-- 2024-06-13 Jisheng Zhang Accepted
[v4,8/8] riscv: dts: starfive: add Milkv Mars board device tree riscv: dts: starfive: add Milkv Mars board device tree - 1 - --1 2024-04-29 Jisheng Zhang Accepted
[v4,7/8] riscv: dts: starfive: introduce a common board dtsi for jh7110 based boards riscv: dts: starfive: add Milkv Mars board device tree - 1 - --1 2024-04-29 Jisheng Zhang Accepted
[v4,6/8] riscv: dts: starfive: visionfive 2: add "disable-wp" for tfcard riscv: dts: starfive: add Milkv Mars board device tree - 1 - --1 2024-04-29 Jisheng Zhang Accepted
[v4,5/8] riscv: dts: starfive: visionfive 2: add tf cd-gpios riscv: dts: starfive: add Milkv Mars board device tree - 1 - --1 2024-04-29 Jisheng Zhang Accepted
[v4,4/8] riscv: dts: starfive: visionfive 2: use cpus label for timebase freq riscv: dts: starfive: add Milkv Mars board device tree - 1 - --1 2024-04-29 Jisheng Zhang Accepted
[v4,3/8] riscv: dts: starfive: visionfive 2: update sound and codec dt node name riscv: dts: starfive: add Milkv Mars board device tree - 1 - --1 2024-04-29 Jisheng Zhang Accepted
[v4,2/8] dt-bindings: riscv: starfive: add Milkv Mars board riscv: dts: starfive: add Milkv Mars board device tree 1 1 - --1 2024-04-29 Jisheng Zhang Accepted
[v4,1/8] riscv: dts: starfive: add 'cpus' label to jh7110 and jh7100 soc dtsi riscv: dts: starfive: add Milkv Mars board device tree - 1 - --1 2024-04-29 Jisheng Zhang Accepted
riscv: boot: remove duplicated targets line riscv: boot: remove duplicated targets line - 1 - 13-- 2024-04-14 Jisheng Zhang Superseded
[v3,2/2] clocksource/drivers/timer-clint: Add T-Head C9xx clint riscv: improve nommu and timer-clint - - - --1 2024-04-10 Jisheng Zhang Changes Requested
[v3,1/2] riscv: nommu: remove PAGE_OFFSET hardcoding riscv: improve nommu and timer-clint - - - --1 2024-04-10 Jisheng Zhang Changes Requested
[v2,3/3] clocksource/drivers/timer-clint: Add T-Head C9xx clint riscv: improve nommu and timer-clint - - - --1 2024-04-06 Jisheng Zhang Superseded
[v2,2/3] clocksource/drivers/timer-clint: Add option to use CSR instead of mtime riscv: improve nommu and timer-clint - - - --1 2024-04-06 Jisheng Zhang Superseded
[v2,1/3] riscv: nommu: remove PAGE_OFFSET hardcoding riscv: improve nommu and timer-clint - - - --1 2024-04-06 Jisheng Zhang Superseded
[v2,3/3] clocksource/drivers/timer-clint: Add set_state_oneshot_stopped clocksouce/timer-clint|riscv: some improvements - - - 13-- 2024-04-06 Jisheng Zhang Superseded
[v2,2/3] clocksource/drivers/timer-clint: Add set_state_shutdown clocksouce/timer-clint|riscv: some improvements - - - 13-- 2024-04-06 Jisheng Zhang Superseded
[v2,1/3] clocksource/drivers/timer-riscv: Add set_state_oneshot_stopped clocksouce/timer-clint|riscv: some improvements - - - 13-- 2024-04-06 Jisheng Zhang Superseded
[3/3] clocksource/drivers/timer-clint: Add set_state_oneshot_stopped clocksouce/timer-clint|riscv: some improvements - - - 13-- 2024-03-27 Jisheng Zhang Superseded
[2/3] clocksource/drivers/timer-clint: Add set_state_shutdown clocksouce/timer-clint|riscv: some improvements - - - 13-- 2024-03-27 Jisheng Zhang Superseded
[1/3] clocksource/drivers/timer-riscv: Add set_state_oneshot_stopped clocksouce/timer-clint|riscv: some improvements - - - 13-- 2024-03-27 Jisheng Zhang Superseded
[5/5] clocksource/drivers/timer-clint: Add T-Head C9xx clint support riscv: improve nommu and timer-clint - - - 10-3 2024-03-25 Jisheng Zhang Superseded
[4/5] clocksource/drivers/timer-clint: Use get_cycles() riscv: improve nommu and timer-clint - - - 12-1 2024-03-25 Jisheng Zhang Superseded
[3/5] clocksource/drivers/timer-clint: Remove clint_time_val riscv: improve nommu and timer-clint - - - 1111 2024-03-25 Jisheng Zhang Superseded
[2/5] riscv: nommu: use CSR_TIME* for get_cycles* implementation riscv: improve nommu and timer-clint - - - 12-1 2024-03-25 Jisheng Zhang Superseded
[1/5] riscv: nommu: remove PAGE_OFFSET hardcoding riscv: improve nommu and timer-clint - - - 12-1 2024-03-25 Jisheng Zhang Superseded
[v3,RESEND,2/2] riscv: cmpxchg: implement arch_cmpxchg64_{relaxed|acquire|release} riscv: enable lockless lockref implementation - 1 - --- 2024-03-25 Jisheng Zhang Accepted
[v3,RESEND,1/2] riscv: select ARCH_USE_CMPXCHG_LOCKREF riscv: enable lockless lockref implementation - 1 - --- 2024-03-25 Jisheng Zhang Accepted
[v3,RESEND] riscv: mm: still create swiotlb buffer for kmalloc() bouncing if required [v3,RESEND] riscv: mm: still create swiotlb buffer for kmalloc() bouncing if required - 1 - 13-- 2024-03-25 Jisheng Zhang Accepted
[v3,RESEND] riscv: select ARCH_HAS_FAST_MULTIPLIER [v3,RESEND] riscv: select ARCH_HAS_FAST_MULTIPLIER - 2 1 13-- 2024-03-25 Jisheng Zhang Accepted
[v2,RESEND] riscv: mm: implement pgprot_nx [v2,RESEND] riscv: mm: implement pgprot_nx - 3 1 --- 2024-03-25 Jisheng Zhang Accepted
[RFC] riscv: dts: sophgo: add sdcard support for milkv duo [RFC] riscv: dts: sophgo: add sdcard support for milkv duo - 1 - 1012 2024-02-17 Jisheng Zhang Handled Elsewhere
[2/2] mmc: sdhci-of-dwcmshc: Add support for Sophgo CV1800B and SG2002 mmc: sdhci-of-dwcmshc: support Sophgo CV1800B and SG2002 - - - 13-- 2024-02-17 Jisheng Zhang Handled Elsewhere
[1/2] dt-bindings: mmc: sdhci-of-dwcmhsc: Add Sophgo CV1800B and SG2002 support mmc: sdhci-of-dwcmshc: support Sophgo CV1800B and SG2002 1 - - 13-- 2024-02-17 Jisheng Zhang Handled Elsewhere
[v3,6/6] riscv: dts: starfive: add Milkv Mars board device tree riscv: dts: starfive: add Milkv Mars board device tree - - - 1012 2024-01-31 Jisheng Zhang conchuod Changes Requested
[v3,5/6] riscv: dts: starfive: introduce a common board dtsi for jh7110 based boards riscv: dts: starfive: add Milkv Mars board device tree - - - 1111 2024-01-31 Jisheng Zhang conchuod Changes Requested
[v3,4/6] riscv: dts: starfive: visionfive 2: use cpus label for timebase freq riscv: dts: starfive: add Milkv Mars board device tree - 1 - 12-1 2024-01-31 Jisheng Zhang conchuod Changes Requested
[v3,3/6] riscv: dts: starfive: visionfive 2: update sound and codec dt node name riscv: dts: starfive: add Milkv Mars board device tree - 1 - 12-1 2024-01-31 Jisheng Zhang conchuod Changes Requested
[v3,2/6] dt-bindings: riscv: starfive: add Milkv Mars board riscv: dts: starfive: add Milkv Mars board device tree 1 1 - 12-1 2024-01-31 Jisheng Zhang conchuod Changes Requested
[v3,1/6] riscv: dts: starfive: add 'cpus' label to jh7110 and jh7100 soc dtsi riscv: dts: starfive: add Milkv Mars board device tree - 1 - 12-1 2024-01-31 Jisheng Zhang conchuod Changes Requested
[3/3] riscv: optimized memset riscv: optimize memcpy/memmove/memset - - - 913 2024-01-28 Jisheng Zhang Changes Requested
[2/3] riscv: optimized memmove riscv: optimize memcpy/memmove/memset - - - 914 2024-01-28 Jisheng Zhang Changes Requested
[1/3] riscv: optimized memcpy riscv: optimize memcpy/memmove/memset - - - 913 2024-01-28 Jisheng Zhang Changes Requested
[v3,2/2] riscv: cmpxchg: implement arch_cmpxchg64_{relaxed|acquire|release} riscv: enable lockless lockref implementation - 1 - 121- 2024-01-25 Jisheng Zhang Superseded
[v3,1/2] riscv: select ARCH_USE_CMPXCHG_LOCKREF riscv: enable lockless lockref implementation - 1 - 121- 2024-01-25 Jisheng Zhang Superseded
[v3] riscv: mm: still create swiotlb buffer for kmalloc() bouncing if required [v3] riscv: mm: still create swiotlb buffer for kmalloc() bouncing if required - 1 - 13-- 2024-01-25 Jisheng Zhang Superseded
[v2] riscv: mm: implement pgprot_nx [v2] riscv: mm: implement pgprot_nx - 3 1 13-- 2024-01-25 Jisheng Zhang Superseded
[v3] riscv: select ARCH_HAS_FAST_MULTIPLIER [v3] riscv: select ARCH_HAS_FAST_MULTIPLIER - 2 1 13-- 2024-01-25 Jisheng Zhang Superseded
[v4,2/2] riscv: select DCACHE_WORD_ACCESS for efficient unaligned access HW riscv: enable EFFICIENT_UNALIGNED_ACCESS and DCACHE_WORD_ACCESS - - - 11-2 2023-12-25 Jisheng Zhang Accepted
[v4,1/2] riscv: introduce RISCV_EFFICIENT_UNALIGNED_ACCESS riscv: enable EFFICIENT_UNALIGNED_ACCESS and DCACHE_WORD_ACCESS - 2 - 12-1 2023-12-25 Jisheng Zhang Accepted
[v3,2/2] riscv: select DCACHE_WORD_ACCESS for efficient unaligned access HW riscv: enable EFFICIENT_UNALIGNED_ACCESS and DCACHE_WORD_ACCESS - - - 11-2 2023-12-23 Jisheng Zhang Superseded
[v3,1/2] riscv: introduce RISCV_EFFICIENT_UNALIGNED_ACCESS riscv: enable EFFICIENT_UNALIGNED_ACCESS and DCACHE_WORD_ACCESS - 1 - 12-1 2023-12-23 Jisheng Zhang Superseded
[4/4] riscv: enable HAVE_FAST_GUP if MMU riscv: support fast gup - 1 - 13-- 2023-12-19 Jisheng Zhang Accepted
[3/4] riscv: enable MMU_GATHER_RCU_TABLE_FREE for SMP && MMU riscv: support fast gup - 1 - 13-- 2023-12-19 Jisheng Zhang Accepted
[2/4] riscv: tlb: convert __p*d_free_tlb() to inline functions riscv: support fast gup - 1 - 13-- 2023-12-19 Jisheng Zhang Accepted
[1/4] riscv: tlb: fix __p*d_free_tlb() riscv: support fast gup - 1 - 13-- 2023-12-19 Jisheng Zhang Accepted
[v2,2/2] riscv: select DCACHE_WORD_ACCESS for efficient unaligned access HW riscv: enable EFFICIENT_UNALIGNED_ACCESS and DCACHE_WORD_ACCESS - - - 10-3 2023-12-03 Jisheng Zhang Superseded
[v2,1/2] riscv: introduce RISCV_EFFICIENT_UNALIGNED_ACCESS riscv: enable EFFICIENT_UNALIGNED_ACCESS and DCACHE_WORD_ACCESS - 1 - 12-1 2023-12-03 Jisheng Zhang Superseded
[v2,3/3] riscv: dts: starfive: add Milkv Mars board device tree riscv: dts: starfive: add Milkv Mars board device tree - - - 121- 2023-12-02 Jisheng Zhang conchuod Superseded
[v2,2/3] dt-bindings: riscv: starfive: add Milkv Mars board riscv: dts: starfive: add Milkv Mars board device tree 1 - - 13-- 2023-12-02 Jisheng Zhang conchuod Superseded
[v2,1/3] riscv: dts: starfive: add 'cpus' label to jh7110 and jh7100 soc dtsi riscv: dts: starfive: add Milkv Mars board device tree - - - 13-- 2023-12-02 Jisheng Zhang conchuod Superseded
[v2,2/2] riscv: cmpxchg: implement arch_cmpxchg64_{relaxed|acquire|release} riscv: enable lockless lockref implementation - - - 121- 2023-12-02 Jisheng Zhang Superseded
[v2,1/2] riscv: select ARCH_USE_CMPXCHG_LOCKREF riscv: enable lockless lockref implementation - - - 121- 2023-12-02 Jisheng Zhang Superseded
[v2] riscv: select ARCH_HAS_FAST_MULTIPLIER [v2] riscv: select ARCH_HAS_FAST_MULTIPLIER - 2 1 13-- 2023-12-02 Jisheng Zhang Superseded
[v2] riscv: mm: still create swiotlb buffer for kmalloc() bouncing if required [v2] riscv: mm: still create swiotlb buffer for kmalloc() bouncing if required - 1 - 13-- 2023-12-02 Jisheng Zhang Superseded
[2/2] riscv: select DCACHE_WORD_ACCESS for efficient unaligned access HW riscv: enable EFFICIENT_UNALIGNED_ACCESS and DCACHE_WORD_ACCESS - - - 9-4 2023-12-02 Jisheng Zhang Superseded
[1/2] riscv: introduce RISCV_EFFICIENT_UNALIGNED_ACCESS riscv: enable EFFICIENT_UNALIGNED_ACCESS and DCACHE_WORD_ACCESS - - - 12-1 2023-12-02 Jisheng Zhang Superseded
riscv: mm: still create swiotlb buffer for kmalloc() bouncing if required riscv: mm: still create swiotlb buffer for kmalloc() bouncing if required - - - 10-3 2023-11-26 Jisheng Zhang Superseded
riscv: dts: starfive: add Milkv Mars board device tree riscv: dts: starfive: add Milkv Mars board device tree - - - 1012 2023-11-26 Jisheng Zhang Superseded
[2/2] riscv: cmpxchg: implement arch_cmpxchg64_{relaxed|acquire|release} riscv: enable lockless lockref implementation - - - 112- 2023-11-25 Jisheng Zhang Superseded
[1/2] riscv: select ARCH_USE_CMPXCHG_LOCKREF riscv: enable lockless lockref implementation - - - 112- 2023-11-25 Jisheng Zhang Superseded
riscv: Select ARCH_WANTS_NO_INSTR riscv: Select ARCH_WANTS_NO_INSTR - - - 13-- 2023-11-23 Jisheng Zhang Accepted
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