| Message ID | 1cfd7b3ba447942784c4f7aa595e962399e9f617.1706577450.git.unicorn_wang@outlook.com (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Delegated to: | Conor Dooley |
| Headers | show |
| Series | riscv: sophgo: add reset support for SG2042 | expand |
ping ~~~ On 2024/1/30 9:50, Chen Wang wrote: > From: Chen Wang <unicorn_wang@outlook.com> > > Reuse reset-simple driver for the Sophgo SG2042 reset generator. > > Signed-off-by: Chen Wang <unicorn_wang@outlook.com> > --- > drivers/reset/Kconfig | 3 ++- > drivers/reset/reset-simple.c | 2 ++ > 2 files changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig > index ccd59ddd7610..2034f69d5953 100644 > --- a/drivers/reset/Kconfig > +++ b/drivers/reset/Kconfig > @@ -213,7 +213,7 @@ config RESET_SCMI > > config RESET_SIMPLE > bool "Simple Reset Controller Driver" if COMPILE_TEST || EXPERT > - default ARCH_ASPEED || ARCH_BCMBCA || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC > + default ARCH_ASPEED || ARCH_BCMBCA || ARCH_BITMAIN || ARCH_REALTEK || ARCH_SOPHGO || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC > depends on HAS_IOMEM > help > This enables a simple reset controller driver for reset lines that > @@ -228,6 +228,7 @@ config RESET_SIMPLE > - RCC reset controller in STM32 MCUs > - Allwinner SoCs > - SiFive FU740 SoCs > + - Sophgo SoCs > > config RESET_SOCFPGA > bool "SoCFPGA Reset Driver" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA) > diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c > index 818cabcc9fb7..276067839830 100644 > --- a/drivers/reset/reset-simple.c > +++ b/drivers/reset/reset-simple.c > @@ -151,6 +151,8 @@ static const struct of_device_id reset_simple_dt_ids[] = { > { .compatible = "snps,dw-high-reset" }, > { .compatible = "snps,dw-low-reset", > .data = &reset_simple_active_low }, > + { .compatible = "sophgo,sg2042-reset", > + .data = &reset_simple_active_low }, > { /* sentinel */ }, > }; > hello, Philipp, Can you please have a look of this, I have fixed the issue you raised in last version, any question please feel free let me know. BTW, will you pick this for v6.9 if it is ok to you. Thanks, Chen
On Di, 2024-01-30 at 09:50 +0800, Chen Wang wrote: > From: Chen Wang <unicorn_wang@outlook.com> > > Reuse reset-simple driver for the Sophgo SG2042 reset generator. > > Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> regards Philipp
Hi Chen, On Do, 2024-02-15 at 16:59 +0800, Chen Wang wrote: > ping ~~~ > [...] > > hello, Philipp, > > Can you please have a look of this, I have fixed the issue you raised in > last version, any question please feel free let me know. > > BTW, will you pick this for v6.9 if it is ok to you. Yes, I intend to do this tomorrow. regards Philipp
On 2024/2/15 20:46, Philipp Zabel wrote: > Hi Chen, > > On Do, 2024-02-15 at 16:59 +0800, Chen Wang wrote: >> ping ~~~ >> > [...] >> hello, Philipp, >> >> Can you please have a look of this, I have fixed the issue you raised in >> last version, any question please feel free let me know. >> >> BTW, will you pick this for v6.9 if it is ok to you. > Yes, I intend to do this tomorrow. > > regards > Philipp Thank you Philipp. One more question, when you pick this patch (I mean 2/4), will you pick the bindings (1/4 of this patchset). I will hanlde other patches about dts.
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index ccd59ddd7610..2034f69d5953 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -213,7 +213,7 @@ config RESET_SCMI config RESET_SIMPLE bool "Simple Reset Controller Driver" if COMPILE_TEST || EXPERT - default ARCH_ASPEED || ARCH_BCMBCA || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC + default ARCH_ASPEED || ARCH_BCMBCA || ARCH_BITMAIN || ARCH_REALTEK || ARCH_SOPHGO || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC depends on HAS_IOMEM help This enables a simple reset controller driver for reset lines that @@ -228,6 +228,7 @@ config RESET_SIMPLE - RCC reset controller in STM32 MCUs - Allwinner SoCs - SiFive FU740 SoCs + - Sophgo SoCs config RESET_SOCFPGA bool "SoCFPGA Reset Driver" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA) diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c index 818cabcc9fb7..276067839830 100644 --- a/drivers/reset/reset-simple.c +++ b/drivers/reset/reset-simple.c @@ -151,6 +151,8 @@ static const struct of_device_id reset_simple_dt_ids[] = { { .compatible = "snps,dw-high-reset" }, { .compatible = "snps,dw-low-reset", .data = &reset_simple_active_low }, + { .compatible = "sophgo,sg2042-reset", + .data = &reset_simple_active_low }, { /* sentinel */ }, };