| Message ID | b2f5d7cd2d3fccfc00cf4563d2dd7363b0fa2fca.1706577450.git.unicorn_wang@outlook.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 1ce7587e507e1762df1dadc22affcd41376040d5 |
| Delegated to: | Conor Dooley |
| Headers | show |
| Series | riscv: sophgo: add reset support for SG2042 | expand |
LGTM Reviewed-by: Inochi Amaoto <inochiama@outlook.com> On Tue, Jan 30, 2024 at 09:50:32AM +0800, Chen Wang wrote: > From: Chen Wang <unicorn_wang@outlook.com> > > Add reset generator node to device tree for SG2042. > > Signed-off-by: Chen Wang <unicorn_wang@outlook.com> > --- > arch/riscv/boot/dts/sophgo/sg2042.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi > index ead1cc35d88b..eeb341e16bfd 100644 > --- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi > +++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi > @@ -6,6 +6,8 @@ > /dts-v1/; > #include <dt-bindings/interrupt-controller/irq.h> > > +#include <dt-bindings/reset/sophgo,sg2042-reset.h> > + > #include "sg2042-cpus.dtsi" > > / { > @@ -327,6 +329,12 @@ intc: interrupt-controller@7090000000 { > riscv,ndev = <224>; > }; > > + rstgen: reset-controller@7030013000 { > + compatible = "sophgo,sg2042-reset"; > + reg = <0x00000070 0x30013000 0x00000000 0x0000000c>; > + #reset-cells = <1>; > + }; > + > uart0: serial@7040000000 { > compatible = "snps,dw-apb-uart"; > reg = <0x00000070 0x40000000 0x00000000 0x00001000>; > -- > 2.25.1 >
diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi index ead1cc35d88b..eeb341e16bfd 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi +++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi @@ -6,6 +6,8 @@ /dts-v1/; #include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/reset/sophgo,sg2042-reset.h> + #include "sg2042-cpus.dtsi" / { @@ -327,6 +329,12 @@ intc: interrupt-controller@7090000000 { riscv,ndev = <224>; }; + rstgen: reset-controller@7030013000 { + compatible = "sophgo,sg2042-reset"; + reg = <0x00000070 0x30013000 0x00000000 0x0000000c>; + #reset-cells = <1>; + }; + uart0: serial@7040000000 { compatible = "snps,dw-apb-uart"; reg = <0x00000070 0x40000000 0x00000000 0x00001000>;