[08/12] riscv: read the hart ID from mhartid on boot

Message ID	20191028121043.22934-9-hch@lst.de (mailing list archive)
State	New, archived
Headers	show Return-Path: <SRS0=R/Cm=YV=lists.infradead.org=linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@kernel.org> DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CBEF92086D From: Christoph Hellwig <hch@lst.de> To: Palmer Dabbelt <palmer@sifive.com>, Paul Walmsley <paul.walmsley@sifive.com> Subject: [PATCH 08/12] riscv: read the hart ID from mhartid on boot Date: Mon, 28 Oct 2019 13:10:39 +0100 Message-Id: <20191028121043.22934-9-hch@lst.de> In-Reply-To: <20191028121043.22934-1-hch@lst.de> References: <20191028121043.22934-1-hch@lst.de> MIME-Version: 1.0 Precedence: list Cc: Anup Patel <anup@brainfault.org>, Damien Le Moal <damien.lemoal@wdc.com>, Atish Patra <atish.patra@wdc.com>, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org
Series	[01/12] riscv: abstract out CSR names for supervisor vs machine mode \| expand [01/12] riscv: abstract out CSR names for supervisor vs machine mode [02/12] riscv: don't allow selecting SBI based drivers for M-mode [03/12] riscv: poison SBI calls for M-mode [04/12] riscv: cleanup the default power off implementation [05/12] riscv: implement remote sfence.i using IPIs [06/12] riscv: add support for MMIO access to the timer registers [07/12] riscv: provide native clint access for M-mode [08/12] riscv: read the hart ID from mhartid on boot [09/12] riscv: clear the instruction cache and all registers when booting [10/12] riscv: add nommu support [11/12] riscv: provide a flat image loader [12/12] riscv: disable the EFI PECOFF header for M-mode

Message ID

20191028121043.22934-9-hch@lst.de (mailing list archive)

State

New, archived

Headers

DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CBEF92086D
From: Christoph Hellwig <hch@lst.de>
To: Palmer Dabbelt <palmer@sifive.com>,
 Paul Walmsley <paul.walmsley@sifive.com>
Subject: [PATCH 08/12] riscv: read the hart ID from mhartid on boot
Date: Mon, 28 Oct 2019 13:10:39 +0100
Message-Id: <20191028121043.22934-9-hch@lst.de>
In-Reply-To: <20191028121043.22934-1-hch@lst.de>
References: <20191028121043.22934-1-hch@lst.de>
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Cc: Anup Patel <anup@brainfault.org>, Damien Le Moal <damien.lemoal@wdc.com>,
 Atish Patra <atish.patra@wdc.com>, linux-riscv@lists.infradead.org,
 linux-kernel@vger.kernel.org
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Series

[01/12] riscv: abstract out CSR names for supervisor vs machine mode | expand

Commit Message

Christoph Hellwig Oct. 28, 2019, 12:10 p.m. UTC

From: Damien Le Moal <damien.lemoal@wdc.com>

When in M-Mode, we can use the mhartid CSR to get the ID of the running
HART. Doing so, direct M-Mode boot without firmware is possible.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/riscv/include/asm/csr.h | 1 +
 arch/riscv/kernel/head.S     | 8 ++++++++
 2 files changed, 9 insertions(+)

diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index 0ab642811028..318192c66fd8 100644
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -99,6 +99,7 @@ 
 #define CSR_MCAUSE		0x342
 #define CSR_MTVAL		0x343
 #define CSR_MIP			0x344
+#define CSR_MHARTID		0xf14
 
 #ifdef CONFIG_RISCV_M_MODE
 # define CSR_STATUS	CSR_MSTATUS
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 5cfd2c582945..fc9973086946 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -50,6 +50,14 @@  _start_kernel:
 	csrw CSR_IE, zero
 	csrw CSR_IP, zero
 
+#ifdef CONFIG_RISCV_M_MODE
+	/*
+	 * The hartid in a0 is expected later on, and we have no firmware
+	 * to hand it to us.
+	 */
+	csrr a0, CSR_MHARTID
+#endif
+
 	/* Load the global pointer */
 .option push
 .option norelax

[08/12] riscv: read the hart ID from mhartid on boot

Commit Message

Patch