| Message ID | 20230111171027.2392-10-jszhang@kernel.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | riscv: improve boot time isa extensions handling | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/patch_count | success | Link |
| conchuod/cover_letter | success | Series has a cover letter |
| conchuod/tree_selection | success | Guessed tree name to be for-next |
| conchuod/fixes_present | success | Fixes tag not required for -next series |
| conchuod/maintainers_pattern | success | MAINTAINERS pattern errors before the patch: 13 and now 13 |
| conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
| conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/module_param | success | Was 0 now: 0 |
| conchuod/alphanumeric_selects | success | Out of order selects before the patch: 57 and now 57 |
| conchuod/build_rv32_defconfig | success | Build OK |
| conchuod/build_warn_rv64 | success | Errors and warnings before: 2054 this patch: 2054 |
| conchuod/dtb_warn_rv64 | success | Errors and warnings before: 4 this patch: 4 |
| conchuod/header_inline | success | No static functions without inline keyword in header files |
| conchuod/checkpatch | warning | WARNING: unnecessary whitespace before a quoted newline |
| conchuod/source_inline | success | Was 0 now: 0 |
| conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
| conchuod/verify_fixes | success | No Fixes tag |
| conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
On Thu, Jan 12, 2023 at 01:10:23AM +0800, Jisheng Zhang wrote: > Instead of using absolute addresses for both the old instrucions and > the alternative instructions, use offsets relative to the alt_entry > values. So this not only cuts the size of the alternative entry, but > also meets the prerequisite for patching alternatives in the vDSO, > since absolute alternative entries are subject to dynamic relocation, > which is incompatible with the vDSO building. > > Signed-off-by: Jisheng Zhang <jszhang@kernel.org> > --- > arch/riscv/errata/sifive/errata.c | 4 +++- > arch/riscv/errata/thead/errata.c | 11 ++++++++--- > arch/riscv/include/asm/alternative-macros.h | 20 ++++++++++---------- > arch/riscv/include/asm/alternative.h | 12 ++++++------ > arch/riscv/kernel/cpufeature.c | 8 +++++--- > 5 files changed, 32 insertions(+), 23 deletions(-) > > diff --git a/arch/riscv/errata/sifive/errata.c b/arch/riscv/errata/sifive/errata.c > index 1031038423e7..0e537cdfd324 100644 > --- a/arch/riscv/errata/sifive/errata.c > +++ b/arch/riscv/errata/sifive/errata.c > @@ -107,7 +107,9 @@ void __init_or_module sifive_errata_patch_func(struct alt_entry *begin, > > tmp = (1U << alt->errata_id); > if (cpu_req_errata & tmp) { > - patch_text_nosync(alt->old_ptr, alt->alt_ptr, alt->alt_len); > + patch_text_nosync((void *)&alt->old_offset + alt->old_offset, > + (void *)&alt->alt_offset + alt->alt_offset, I was hoping to see Conor's macro suggestion show up in this version. > + alt->alt_len); > cpu_apply_errata |= tmp; > } > } > diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c > index fac5742d1c1e..d56d76a529b5 100644 > --- a/arch/riscv/errata/thead/errata.c > +++ b/arch/riscv/errata/thead/errata.c > @@ -87,6 +87,7 @@ void __init_or_module thead_errata_patch_func(struct alt_entry *begin, struct al > struct alt_entry *alt; > u32 cpu_req_errata = thead_errata_probe(stage, archid, impid); > u32 tmp; > + void *oldptr, *altptr; > > for (alt = begin; alt < end; alt++) { > if (alt->vendor_id != THEAD_VENDOR_ID) > @@ -96,12 +97,16 @@ void __init_or_module thead_errata_patch_func(struct alt_entry *begin, struct al > > tmp = (1U << alt->errata_id); > if (cpu_req_errata & tmp) { > + oldptr = (void *)&alt->old_offset + alt->old_offset; > + altptr = (void *)&alt->alt_offset + alt->alt_offset; > + > /* On vm-alternatives, the mmu isn't running yet */ > if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) > - memcpy((void *)__pa_symbol(alt->old_ptr), > - (void *)__pa_symbol(alt->alt_ptr), alt->alt_len); > + memcpy((void *)__pa_symbol(oldptr), > + (void *)__pa_symbol(altptr), > + alt->alt_len); > else > - patch_text_nosync(alt->old_ptr, alt->alt_ptr, alt->alt_len); > + patch_text_nosync(oldptr, altptr, alt->alt_len); > } > } > > diff --git a/arch/riscv/include/asm/alternative-macros.h b/arch/riscv/include/asm/alternative-macros.h > index 7226e2462584..3c3ca65e521b 100644 > --- a/arch/riscv/include/asm/alternative-macros.h > +++ b/arch/riscv/include/asm/alternative-macros.h > @@ -7,11 +7,11 @@ > #ifdef __ASSEMBLY__ > > .macro ALT_ENTRY oldptr newptr vendor_id errata_id new_len > - RISCV_PTR \oldptr > - RISCV_PTR \newptr > - REG_ASM \vendor_id > - REG_ASM \new_len > - .word \errata_id > + .long \oldptr - . > + .long \newptr - . > + .short \vendor_id > + .short \new_len > + .long \errata_id nit: I like .2byte and .4byte since I always have to double check how many bytes .long is. > .endm > > .macro ALT_NEW_CONTENT vendor_id, errata_id, enable = 1, new_c : vararg > @@ -59,11 +59,11 @@ > #include <linux/stringify.h> > > #define ALT_ENTRY(oldptr, newptr, vendor_id, errata_id, newlen) \ > - RISCV_PTR " " oldptr "\n" \ > - RISCV_PTR " " newptr "\n" \ > - REG_ASM " " vendor_id "\n" \ > - REG_ASM " " newlen "\n" \ > - ".word " errata_id "\n" > + ".long ((" oldptr ") - .) \n" \ > + ".long ((" newptr ") - .) \n" \ > + ".short " vendor_id "\n" \ > + ".short " newlen "\n" \ > + ".long " errata_id "\n" > > #define ALT_NEW_CONTENT(vendor_id, errata_id, enable, new_c) \ > ".if " __stringify(enable) " == 1\n" \ > diff --git a/arch/riscv/include/asm/alternative.h b/arch/riscv/include/asm/alternative.h > index 1bd4027d34ca..b6050a235f50 100644 > --- a/arch/riscv/include/asm/alternative.h > +++ b/arch/riscv/include/asm/alternative.h > @@ -31,12 +31,12 @@ void riscv_alternative_fix_offsets(void *alt_ptr, unsigned int len, > int patch_offset); > > struct alt_entry { > - void *old_ptr; /* address of original instruciton or data */ > - void *alt_ptr; /* address of replacement instruction or data */ > - unsigned long vendor_id; /* cpu vendor id */ > - unsigned long alt_len; /* The replacement size */ > - unsigned int errata_id; /* The errata id */ > -} __packed; > + s32 old_offset; /* offset relative to original instruciton or data */ ^ instruction (The typo was already there, but, IMO, we can fix something like that while touching it.) > + s32 alt_offset; /* offset relative to replacement instruction or data */ > + u16 vendor_id; /* cpu vendor id */ > + u16 alt_len; /* The replacement size */ > + u32 errata_id; /* The errata id */ > +}; > > struct errata_checkfunc_id { > unsigned long vendor_id; > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c > index 6db8b31d9149..c394cde2560b 100644 > --- a/arch/riscv/kernel/cpufeature.c > +++ b/arch/riscv/kernel/cpufeature.c > @@ -280,6 +280,7 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin, > unsigned int stage) > { > struct alt_entry *alt; > + void *oldptr, *altptr; > > if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) > return; > @@ -293,12 +294,13 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin, > continue; > } > > + oldptr = (void *)&alt->old_offset + alt->old_offset; > + altptr = (void *)&alt->alt_offset + alt->alt_offset; > if (!__riscv_isa_extension_available(NULL, alt->errata_id)) > continue; > > - patch_text_nosync(alt->old_ptr, alt->alt_ptr, alt->alt_len); > - riscv_alternative_fix_offsets(alt->old_ptr, alt->alt_len, > - alt->old_ptr - alt->alt_ptr); > + patch_text_nosync(oldptr, altptr, alt->alt_len); > + riscv_alternative_fix_offsets(oldptr, alt->alt_len, oldptr - altptr); > } > } > #endif > -- > 2.38.1 Besides preferring a macro and the nits, LGTM Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Thanks, drew
Hey Jisheng, On Thu, Jan 12, 2023 at 01:10:23AM +0800, Jisheng Zhang wrote: > Instead of using absolute addresses for both the old instrucions and > the alternative instructions, use offsets relative to the alt_entry > values. So this not only cuts the size of the alternative entry, but > also meets the prerequisite for patching alternatives in the vDSO, > since absolute alternative entries are subject to dynamic relocation, > which is incompatible with the vDSO building. > > Signed-off-by: Jisheng Zhang <jszhang@kernel.org> > --- > arch/riscv/errata/sifive/errata.c | 4 +++- > arch/riscv/errata/thead/errata.c | 11 ++++++++--- > arch/riscv/include/asm/alternative-macros.h | 20 ++++++++++---------- > arch/riscv/include/asm/alternative.h | 12 ++++++------ > arch/riscv/kernel/cpufeature.c | 8 +++++--- > 5 files changed, 32 insertions(+), 23 deletions(-) > > diff --git a/arch/riscv/errata/sifive/errata.c b/arch/riscv/errata/sifive/errata.c > index 1031038423e7..0e537cdfd324 100644 > --- a/arch/riscv/errata/sifive/errata.c > +++ b/arch/riscv/errata/sifive/errata.c > @@ -107,7 +107,9 @@ void __init_or_module sifive_errata_patch_func(struct alt_entry *begin, > > tmp = (1U << alt->errata_id); > if (cpu_req_errata & tmp) { > - patch_text_nosync(alt->old_ptr, alt->alt_ptr, alt->alt_len); > + patch_text_nosync((void *)&alt->old_offset + alt->old_offset, > + (void *)&alt->alt_offset + alt->alt_offset, > + alt->alt_len); I left a comment on v2 that went unanswered: https://lore.kernel.org/all/Y4+3nJ53nvmmc8+z@spud/ The TL;DR is that I would like you to create a macro for this so that this messy operation is done in a central location, with a nice comment explaining the offsets. If my "analysis" there was correct, feel free to use it as a starting point for said comment. The macro would then reduce the above to something like: patch_text_nosync(ALT_OFFSET_ADDRESS(alt->old_offset), ALT_OFFSET_ADDRESS(alt->alt_offset), alt->alt_len); Which I think is easier to understand since this "concept" will show up in several places & is less intuitive than what we currently have. Nothing beats having this stuff well explained in the codebase IMO. > diff --git a/arch/riscv/include/asm/alternative.h b/arch/riscv/include/asm/alternative.h > index 1bd4027d34ca..b6050a235f50 100644 > --- a/arch/riscv/include/asm/alternative.h > +++ b/arch/riscv/include/asm/alternative.h > @@ -31,12 +31,12 @@ void riscv_alternative_fix_offsets(void *alt_ptr, unsigned int len, > int patch_offset); > > struct alt_entry { > - void *old_ptr; /* address of original instruciton or data */ > - void *alt_ptr; /* address of replacement instruction or data */ > - unsigned long vendor_id; /* cpu vendor id */ > - unsigned long alt_len; /* The replacement size */ > - unsigned int errata_id; /* The errata id */ > -} __packed; > + s32 old_offset; /* offset relative to original instruciton or data */ > + s32 alt_offset; /* offset relative to replacement instruction or data */ This wording is better, but you should fix the "instruciton" typo while you are in the area. > + u16 vendor_id; /* cpu vendor id */ > + u16 alt_len; /* The replacement size */ > + u32 errata_id; /* The errata id */ > +}; Thanks, Conor.
diff --git a/arch/riscv/errata/sifive/errata.c b/arch/riscv/errata/sifive/errata.c index 1031038423e7..0e537cdfd324 100644 --- a/arch/riscv/errata/sifive/errata.c +++ b/arch/riscv/errata/sifive/errata.c @@ -107,7 +107,9 @@ void __init_or_module sifive_errata_patch_func(struct alt_entry *begin, tmp = (1U << alt->errata_id); if (cpu_req_errata & tmp) { - patch_text_nosync(alt->old_ptr, alt->alt_ptr, alt->alt_len); + patch_text_nosync((void *)&alt->old_offset + alt->old_offset, + (void *)&alt->alt_offset + alt->alt_offset, + alt->alt_len); cpu_apply_errata |= tmp; } } diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c index fac5742d1c1e..d56d76a529b5 100644 --- a/arch/riscv/errata/thead/errata.c +++ b/arch/riscv/errata/thead/errata.c @@ -87,6 +87,7 @@ void __init_or_module thead_errata_patch_func(struct alt_entry *begin, struct al struct alt_entry *alt; u32 cpu_req_errata = thead_errata_probe(stage, archid, impid); u32 tmp; + void *oldptr, *altptr; for (alt = begin; alt < end; alt++) { if (alt->vendor_id != THEAD_VENDOR_ID) @@ -96,12 +97,16 @@ void __init_or_module thead_errata_patch_func(struct alt_entry *begin, struct al tmp = (1U << alt->errata_id); if (cpu_req_errata & tmp) { + oldptr = (void *)&alt->old_offset + alt->old_offset; + altptr = (void *)&alt->alt_offset + alt->alt_offset; + /* On vm-alternatives, the mmu isn't running yet */ if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) - memcpy((void *)__pa_symbol(alt->old_ptr), - (void *)__pa_symbol(alt->alt_ptr), alt->alt_len); + memcpy((void *)__pa_symbol(oldptr), + (void *)__pa_symbol(altptr), + alt->alt_len); else - patch_text_nosync(alt->old_ptr, alt->alt_ptr, alt->alt_len); + patch_text_nosync(oldptr, altptr, alt->alt_len); } } diff --git a/arch/riscv/include/asm/alternative-macros.h b/arch/riscv/include/asm/alternative-macros.h index 7226e2462584..3c3ca65e521b 100644 --- a/arch/riscv/include/asm/alternative-macros.h +++ b/arch/riscv/include/asm/alternative-macros.h @@ -7,11 +7,11 @@ #ifdef __ASSEMBLY__ .macro ALT_ENTRY oldptr newptr vendor_id errata_id new_len - RISCV_PTR \oldptr - RISCV_PTR \newptr - REG_ASM \vendor_id - REG_ASM \new_len - .word \errata_id + .long \oldptr - . + .long \newptr - . + .short \vendor_id + .short \new_len + .long \errata_id .endm .macro ALT_NEW_CONTENT vendor_id, errata_id, enable = 1, new_c : vararg @@ -59,11 +59,11 @@ #include <linux/stringify.h> #define ALT_ENTRY(oldptr, newptr, vendor_id, errata_id, newlen) \ - RISCV_PTR " " oldptr "\n" \ - RISCV_PTR " " newptr "\n" \ - REG_ASM " " vendor_id "\n" \ - REG_ASM " " newlen "\n" \ - ".word " errata_id "\n" + ".long ((" oldptr ") - .) \n" \ + ".long ((" newptr ") - .) \n" \ + ".short " vendor_id "\n" \ + ".short " newlen "\n" \ + ".long " errata_id "\n" #define ALT_NEW_CONTENT(vendor_id, errata_id, enable, new_c) \ ".if " __stringify(enable) " == 1\n" \ diff --git a/arch/riscv/include/asm/alternative.h b/arch/riscv/include/asm/alternative.h index 1bd4027d34ca..b6050a235f50 100644 --- a/arch/riscv/include/asm/alternative.h +++ b/arch/riscv/include/asm/alternative.h @@ -31,12 +31,12 @@ void riscv_alternative_fix_offsets(void *alt_ptr, unsigned int len, int patch_offset); struct alt_entry { - void *old_ptr; /* address of original instruciton or data */ - void *alt_ptr; /* address of replacement instruction or data */ - unsigned long vendor_id; /* cpu vendor id */ - unsigned long alt_len; /* The replacement size */ - unsigned int errata_id; /* The errata id */ -} __packed; + s32 old_offset; /* offset relative to original instruciton or data */ + s32 alt_offset; /* offset relative to replacement instruction or data */ + u16 vendor_id; /* cpu vendor id */ + u16 alt_len; /* The replacement size */ + u32 errata_id; /* The errata id */ +}; struct errata_checkfunc_id { unsigned long vendor_id; diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 6db8b31d9149..c394cde2560b 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -280,6 +280,7 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin, unsigned int stage) { struct alt_entry *alt; + void *oldptr, *altptr; if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) return; @@ -293,12 +294,13 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin, continue; } + oldptr = (void *)&alt->old_offset + alt->old_offset; + altptr = (void *)&alt->alt_offset + alt->alt_offset; if (!__riscv_isa_extension_available(NULL, alt->errata_id)) continue; - patch_text_nosync(alt->old_ptr, alt->alt_ptr, alt->alt_len); - riscv_alternative_fix_offsets(alt->old_ptr, alt->alt_len, - alt->old_ptr - alt->alt_ptr); + patch_text_nosync(oldptr, altptr, alt->alt_len); + riscv_alternative_fix_offsets(oldptr, alt->alt_len, oldptr - altptr); } } #endif
Instead of using absolute addresses for both the old instrucions and the alternative instructions, use offsets relative to the alt_entry values. So this not only cuts the size of the alternative entry, but also meets the prerequisite for patching alternatives in the vDSO, since absolute alternative entries are subject to dynamic relocation, which is incompatible with the vDSO building. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> --- arch/riscv/errata/sifive/errata.c | 4 +++- arch/riscv/errata/thead/errata.c | 11 ++++++++--- arch/riscv/include/asm/alternative-macros.h | 20 ++++++++++---------- arch/riscv/include/asm/alternative.h | 12 ++++++------ arch/riscv/kernel/cpufeature.c | 8 +++++--- 5 files changed, 32 insertions(+), 23 deletions(-)