Show patches with: Series = support vector extension v1.0       |    State = Action Required       |   72 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v6,72/72] target/riscv: set mstatus.SD bit when writing fp CSRs support vector extension v1.0 - - - --- 2021-01-12 Frank Chang New
[v6,71/72] target/riscv: rvv-1.0: floating-point reciprocal estimate instruction support vector extension v1.0 - - - --- 2021-01-12 Frank Chang New
[v6,70/72] target/riscv: rvv-1.0: floating-point reciprocal square-root estimate instruction support vector extension v1.0 - - - --- 2021-01-12 Frank Chang New
[v6,69/72] target/riscv: gdb: support vector registers for rv64 & rv32 support vector extension v1.0 - - - --- 2021-01-12 Frank Chang New
[v6,68/72] target/riscv: gdb: modify gdb csr xml file to align with csr register map support vector extension v1.0 1 - - --- 2021-01-12 Frank Chang New
[v6,67/72] target/riscv: rvv-1.0: set mstatus.SD bit when writing vector CSRs support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,66/72] target/riscv: rvv-1.0: trigger illegal instruction exception if frm is not valid support vector extension v1.0 - - - --- 2021-01-12 Frank Chang New
[v6,65/72] target/riscv: rvv-1.0: implement vstart CSR support vector extension v1.0 - - - --- 2021-01-12 Frank Chang New
[v6,64/72] target/riscv: rvv-1.0: relax RV_VLEN_MAX to 1024-bits support vector extension v1.0 - - - --- 2021-01-12 Frank Chang New
[v6,63/72] target/riscv: rvv-1.0: narrowing floating-point/integer type-convert support vector extension v1.0 - - - --- 2021-01-12 Frank Chang New
[v6,62/72] target/riscv: add "set round to odd" rounding mode helper function support vector extension v1.0 - - - --- 2021-01-12 Frank Chang New
[v6,61/72] target/riscv: rvv-1.0: widening floating-point/integer type-convert support vector extension v1.0 - - - --- 2021-01-12 Frank Chang New
[v6,60/72] target/riscv: rvv-1.0: floating-point/integer type-convert instructions support vector extension v1.0 - - - --- 2021-01-12 Frank Chang New
[v6,59/72] target/riscv: introduce floating-point rounding mode enum support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,58/72] target/riscv: rvv-1.0: floating-point min/max instructions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,57/72] target/riscv: rvv-1.0: remove integer extract instruction support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,56/72] target/riscv: rvv-1.0: remove vmford.vv and vmford.vf support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,55/72] target/riscv: rvv-1.0: remove widening saturating scaled multiply-add support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,54/72] target/riscv: rvv-1.0: single-width scaling shift instructions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,53/72] target/riscv: rvv-1.0: widening floating-point reduction instructions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,52/72] target/riscv: rvv-1.0: single-width floating-point reduction support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,51/72] target/riscv: rvv-1.0: narrowing fixed-point clip instructions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,50/72] target/riscv: rvv-1.0: floating-point slide instructions support vector extension v1.0 - - - --- 2021-01-12 Frank Chang New
[v6,49/72] target/riscv: rvv-1.0: slide instructions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,48/72] target/riscv: rvv-1.0: mask-register logical instructions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,47/72] target/riscv: rvv-1.0: floating-point compare instructions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,46/72] target/riscv: rvv-1.0: integer comparison instructions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,45/72] target/riscv: rvv-1.0: single-width saturating add and subtract instructions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,44/72] target/riscv: rvv-1.0: widening integer multiply-add instructions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,43/72] target/riscv: rvv-1.0: narrowing integer right shift instructions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,42/72] target/riscv: rvv-1.0: integer add-with-carry/subtract-with-borrow support vector extension v1.0 - - - --- 2021-01-12 Frank Chang New
[v6,41/72] target/riscv: rvv-1.0: single-width bit shift instructions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,40/72] target/riscv: rvv-1.0: single-width averaging add and subtract instructions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,39/72] target/riscv: rvv-1.0: integer extension instructions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,38/72] target/riscv: rvv-1.0: whole register move instructions support vector extension v1.0 - - - --- 2021-01-12 Frank Chang New
[v6,37/72] target/riscv: rvv-1.0: floating-point scalar move instructions support vector extension v1.0 - - - --- 2021-01-12 Frank Chang New
[v6,36/72] target/riscv: rvv-1.0: floating-point move instruction support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,35/72] target/riscv: rvv-1.0: integer scalar move instructions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,34/72] target/riscv: rvv-1.0: register gather instructions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,33/72] target/riscv: rvv-1.0: allow load element with sign-extended support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,32/72] target/riscv: rvv-1.0: element index instruction support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,31/72] target/riscv: rvv-1.0: iota instruction support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,30/72] target/riscv: rvv-1.0: set-X-first mask bit instructions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,29/72] target/riscv: rvv-1.0: find-first-set mask bit instruction support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,28/72] target/riscv: rvv-1.0: mask population count instruction support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,27/72] target/riscv: rvv-1.0: floating-point classify instructions support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New
[v6,26/72] target/riscv: rvv-1.0: floating-point square-root instruction support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New
[v6,25/72] target/riscv: rvv-1.0: take fractional LMUL into vector max elements calculation support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New
[v6,24/72] target/riscv: rvv-1.0: update vext_max_elems() for load/store insns support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,23/72] target/riscv: rvv-1.0: load/store whole register instructions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,22/72] target/riscv: rvv-1.0: amo operations support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,21/72] target/riscv: rvv-1.0: fault-only-first unit stride load support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New
[v6,20/72] target/riscv: rvv-1.0: fix address index overflow bug of indexed load/store insns support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New
[v6,19/72] target/riscv: rvv-1.0: index load and store instructions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,18/72] target/riscv: rvv-1.0: stride load and store instructions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,17/72] target/riscv: rvv-1.0: configure instructions support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New
[v6,16/72] target/riscv: rvv:1.0: add translation-time nan-box helper function support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New
[v6,15/72] target/riscv: introduce more imm value modes in translator functions support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New
[v6,14/72] target/riscv: rvv-1.0: update check functions support vector extension v1.0 - 1 - --- 2021-01-12 Frank Chang New
[v6,13/72] target/riscv: rvv-1.0: add VMA and VTA support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New
[v6,12/72] target/riscv: rvv-1.0: add fractional LMUL support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New
[v6,11/72] target/riscv: rvv-1.0: remove MLEN calculations support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New
[v6,10/72] target/riscv: rvv-1.0: check MSTATUS_VS when accessing vector csr registers support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New
[v6,09/72] target/riscv: rvv-1.0: add vlenb register support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New
[v6,08/72] target/riscv: rvv-1.0: add vcsr register support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New
[v6,07/72] target/riscv: rvv-1.0: remove rvv related codes from fcsr registers support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New
[v6,06/72] target/riscv: rvv-1.0: add translation-time vector context status support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New
[v6,05/72] target/riscv: rvv-1.0: introduce writable misa.v field support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New
[v6,04/72] target/riscv: rvv-1.0: add sstatus VS field support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New
[v6,03/72] target/riscv: rvv-1.0: add mstatus VS field support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New
[v6,02/72] target/riscv: Use FIELD_EX32() to extract wd field support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New
[v6,01/72] target/riscv: drop vector 0.7.1 and add 1.0 support support vector extension v1.0 - 2 - --- 2021-01-12 Frank Chang New