diff mbox series

[v2,04/25] drm/i915/bmg: Define IS_BATTLEMAGE macro

Message ID 20240403112253.1432390-5-balasubramani.vivekanandan@intel.com (mailing list archive)
State New
Headers show
Series Enable dislay support for Battlemage | expand

Commit Message

Balasubramani Vivekanandan April 3, 2024, 11:22 a.m. UTC
Display code uses IS_BATTLEMAGE macro but the platform support doesn't
still exist in i915. So fake IS_BATTLEMAGE macro defined to enable
building i915 code.  We should make sure the macro parameter is used in
the always-false expression so that we don't run into "unused variable"
warnings from i915 builds if the IS_BATTLEMAGE() check is the only place
the i915 pointer gets used in a function.

While we're at it, also update the IS_LUNARLAKE macro to include the
parameter in the false expression for consistency.

Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

Comments

Matt Roper April 3, 2024, 6:11 p.m. UTC | #1
On Wed, Apr 03, 2024 at 04:52:32PM +0530, Balasubramani Vivekanandan wrote:
> Display code uses IS_BATTLEMAGE macro but the platform support doesn't
> still exist in i915. So fake IS_BATTLEMAGE macro defined to enable

I'd drop the "still" here since that wording would incorrectly imply
that i915 had Battlemage support previously.

Otherwise,

        Reviewed-by: Matt Roper <matthew.d.roper@intel.com>


Matt

> building i915 code.  We should make sure the macro parameter is used in
> the always-false expression so that we don't run into "unused variable"
> warnings from i915 builds if the IS_BATTLEMAGE() check is the only place
> the i915 pointer gets used in a function.
> 
> While we're at it, also update the IS_LUNARLAKE macro to include the
> parameter in the false expression for consistency.
> 
> Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index cf52d4adaa20..b41a414079f4 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -546,7 +546,15 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  #define IS_ALDERLAKE_P(i915) IS_PLATFORM(i915, INTEL_ALDERLAKE_P)
>  #define IS_DG2(i915)	IS_PLATFORM(i915, INTEL_DG2)
>  #define IS_METEORLAKE(i915) IS_PLATFORM(i915, INTEL_METEORLAKE)
> -#define IS_LUNARLAKE(i915) 0
> +/*
> + * Display code shared by i915 and Xe relies on macros like IS_LUNARLAKE,
> + * so we need to define these even on platforms that the i915 base driver
> + * doesn't support.  Ensure the parameter is used in the definition to
> + * avoid 'unused variable' warnings when compiling the shared display code
> + * for i915.
> + */
> +#define IS_LUNARLAKE(i915) (0 && i915)
> +#define IS_BATTLEMAGE(i915)  (0 && i915)
>  
>  #define IS_DG2_G10(i915) \
>  	IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G10)
> -- 
> 2.25.1
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index cf52d4adaa20..b41a414079f4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -546,7 +546,15 @@  IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define IS_ALDERLAKE_P(i915) IS_PLATFORM(i915, INTEL_ALDERLAKE_P)
 #define IS_DG2(i915)	IS_PLATFORM(i915, INTEL_DG2)
 #define IS_METEORLAKE(i915) IS_PLATFORM(i915, INTEL_METEORLAKE)
-#define IS_LUNARLAKE(i915) 0
+/*
+ * Display code shared by i915 and Xe relies on macros like IS_LUNARLAKE,
+ * so we need to define these even on platforms that the i915 base driver
+ * doesn't support.  Ensure the parameter is used in the definition to
+ * avoid 'unused variable' warnings when compiling the shared display code
+ * for i915.
+ */
+#define IS_LUNARLAKE(i915) (0 && i915)
+#define IS_BATTLEMAGE(i915)  (0 && i915)
 
 #define IS_DG2_G10(i915) \
 	IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G10)