[00/12] Add Milk-V Pioneer RISC-V board support

Message ID	20230915070856.117514-1-wangchen20@iscas.ac.cn (mailing list archive)
Headers	show Return-Path: <linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org> From: Wang Chen <unicornxw@gmail.com> To: linux-riscv@lists.infradead.org, conor@kernel.org, aou@eecs.berkeley.edu, krzysztof.kozlowski+dt@linaro.org, palmer@dabbelt.com, paul.walmsley@sifive.com, robh+dt@kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, jszhang@kernel.org, guoren@kernel.org, chao.wei@sophgo.com, xiaoguang.xing@sophgo.com, Wang Chen <wangchen20@iscas.ac.cn> Subject: [PATCH 00/12] Add Milk-V Pioneer RISC-V board support Date: Fri, 15 Sep 2023 15:08:56 +0800 Message-Id: <20230915070856.117514-1-wangchen20@iscas.ac.cn> MIME-Version: 1.0 Precedence: list Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org
Series	Add Milk-V Pioneer RISC-V board support \| expand [00/12] Add Milk-V Pioneer RISC-V board support [01/12] riscv: Add SOPHGO SOC family Kconfig support [02/12] dt-bindings: vendor-prefixes: add milkv/sophgo [03/12] dt-bindings: riscv: add sophgo sg2042 bindings [04/12] dt-bindings: riscv: Add T-HEAD C920 compatibles [05/12] dt-bindings: interrupt-controller: Add SOPHGO's SG2042 PLIC [06/12] dt-bindings: timer: Add Sophgo sg2042 clint [07/12] riscv: dts: add initial SOPHGO SG2042 SoC device tree [08/12] riscv: dts: sophgo: add Milk-V Pioneer board device tree [09/12] dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2042 uarts [10/12] serial: 8250_dw: Add Sophgo SG2042 support [11/12] riscv: dts: sophgo: Add sophgo,sg2024-uart compatibles [12/12] riscv: defconfig: enable SOPHGO SoC

Message ID

20230915070856.117514-1-wangchen20@iscas.ac.cn (mailing list archive)

Headers

From: Wang Chen <unicornxw@gmail.com>
To: linux-riscv@lists.infradead.org,
	conor@kernel.org,
	aou@eecs.berkeley.edu,
	krzysztof.kozlowski+dt@linaro.org,
	palmer@dabbelt.com,
	paul.walmsley@sifive.com,
	robh+dt@kernel.org
Cc: devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	jszhang@kernel.org,
	guoren@kernel.org,
	chao.wei@sophgo.com,
	xiaoguang.xing@sophgo.com,
	Wang Chen <wangchen20@iscas.ac.cn>
Subject: [PATCH 00/12] Add Milk-V Pioneer RISC-V board support
Date: Fri, 15 Sep 2023 15:08:56 +0800
Message-Id: <20230915070856.117514-1-wangchen20@iscas.ac.cn>
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Content-Type: text/plain; charset="us-ascii"
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 linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org

Series

Add Milk-V Pioneer RISC-V board support | expand

Message

Chen Wang Sept. 15, 2023, 7:08 a.m. UTC

Milk-V Pioneer [1] is a developer motherboard based on SOPHON SG2042 [2]
in a standard mATX form factor. Add minimal device
tree files for the SG2042 SOC and the Milk-V Pioneer board.

Now only support basic uart drivers to boot up into a basic console.

The patch series is based on v6.6-rc1. You can simply review or test 
the patches at the link [3]. Hope this series will be merged soon.

Thanks

[1]: https://milkv.io/pioneer
[2]: https://en.sophgo.com/product/introduce/sg2042.html
[3]: https://github.com/unicornx/linux-riscv/commits/milkv-pioneer-minimal

Emil Renner Berthing (2):
  dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2042 uarts
  serial: 8250_dw: Add Sophgo SG2042 support

Inochi Amaoto (1):
  dt-bindings: timer: Add Sophgo sg2042 clint

Wang Chen (8):
  dt-bindings: vendor-prefixes: add milkv/sophgo
  dt-bindings: riscv: add sophgo sg2042 bindings
  dt-bindings: riscv: Add T-HEAD C920 compatibles
  dt-bindings: interrupt-controller: Add SOPHGO's SG2042 PLIC
  riscv: dts: add initial SOPHGO SG2042 SoC device tree
  riscv: dts: sophgo: add Milk-V Pioneer board device tree
  riscv: dts: sophgo: Add sophgo,sg2024-uart compatibles
  riscv: defconfig: enable SOPHGO SoC

xiaoguang.xing (1):
  riscv: Add SOPHGO SOC family Kconfig support

 .../sifive,plic-1.0.0.yaml                    |    1 +
 .../devicetree/bindings/riscv/cpus.yaml       |    1 +
 .../devicetree/bindings/riscv/sophgo.yaml     |   28 +
 .../bindings/serial/snps-dw-apb-uart.yaml     |    3 +
 .../bindings/timer/sifive,clint.yaml          |   26 +
 .../devicetree/bindings/vendor-prefixes.yaml  |    4 +
 MAINTAINERS                                   |    7 +
 arch/riscv/Kconfig.socs                       |   10 +
 arch/riscv/boot/dts/Makefile                  |    1 +
 arch/riscv/boot/dts/sophgo/Makefile           |    3 +
 arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi   | 1794 +++++++++++++++++
 .../boot/dts/sophgo/sg2042-milkv-pioneer.dts  |   16 +
 arch/riscv/boot/dts/sophgo/sg2042.dtsi        |  513 +++++
 arch/riscv/configs/defconfig                  |    1 +
 drivers/tty/serial/8250/8250_dw.c             |    5 +-
 15 files changed, 2411 insertions(+), 2 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/riscv/sophgo.yaml
 create mode 100644 arch/riscv/boot/dts/sophgo/Makefile
 create mode 100644 arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi
 create mode 100644 arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts
 create mode 100644 arch/riscv/boot/dts/sophgo/sg2042.dtsi

Comments

Conor Dooley Sept. 15, 2023, 7:25 a.m. UTC | #1

Hey,

On Fri, Sep 15, 2023 at 03:08:56PM +0800, Wang Chen wrote:
> Milk-V Pioneer [1] is a developer motherboard based on SOPHON SG2042 [2]
> in a standard mATX form factor. Add minimal device
> tree files for the SG2042 SOC and the Milk-V Pioneer board.

Cool, thanks for working on this.

> 
> Now only support basic uart drivers to boot up into a basic console.
> 
> The patch series is based on v6.6-rc1. You can simply review or test 
> the patches at the link [3]. Hope this series will be merged soon.
> 
> Thanks
> 
> [1]: https://milkv.io/pioneer
> [2]: https://en.sophgo.com/product/introduce/sg2042.html
> [3]: https://github.com/unicornx/linux-riscv/commits/milkv-pioneer-minimal
> 
> Emil Renner Berthing (2):
>   dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2042 uarts
>   serial: 8250_dw: Add Sophgo SG2042 support
> 
> Inochi Amaoto (1):
>   dt-bindings: timer: Add Sophgo sg2042 clint
> 
> Wang Chen (8):
>   dt-bindings: vendor-prefixes: add milkv/sophgo
>   dt-bindings: riscv: add sophgo sg2042 bindings
>   dt-bindings: riscv: Add T-HEAD C920 compatibles
>   dt-bindings: interrupt-controller: Add SOPHGO's SG2042 PLIC
>   riscv: dts: add initial SOPHGO SG2042 SoC device tree
>   riscv: dts: sophgo: add Milk-V Pioneer board device tree
>   riscv: dts: sophgo: Add sophgo,sg2024-uart compatibles
>   riscv: defconfig: enable SOPHGO SoC
> 
> xiaoguang.xing (1):
>   riscv: Add SOPHGO SOC family Kconfig support

One thing on sending patchsets - you've not threaded this patchset,
where each patch is a reply to the cover letter. This makes it more
difficult to apply the series as a human & ~impossible for the
automation to test correctly.
Git should do this for you if run send-email on an entire directory,
or you can pass the message-id of the cover letter with an argument.
The first option is likely a lot easier for you...

Thanks,
Conor.

Chen Wang Sept. 16, 2023, 12:19 a.m. UTC | #2

Regards,

unicornx

Conor Dooley <conor.dooley@microchip.com> 于2023年9月15日周五 15:26写道：
>
> Hey,
>
> On Fri, Sep 15, 2023 at 03:08:56PM +0800, Wang Chen wrote:
> > Milk-V Pioneer [1] is a developer motherboard based on SOPHON SG2042 [2]
> > in a standard mATX form factor. Add minimal device
> > tree files for the SG2042 SOC and the Milk-V Pioneer board.
>
> Cool, thanks for working on this.
>
> >
> > Now only support basic uart drivers to boot up into a basic console.
> >
> > The patch series is based on v6.6-rc1. You can simply review or test
> > the patches at the link [3]. Hope this series will be merged soon.
> >
> > Thanks
> >
> > [1]: https://milkv.io/pioneer
> > [2]: https://en.sophgo.com/product/introduce/sg2042.html
> > [3]: https://github.com/unicornx/linux-riscv/commits/milkv-pioneer-minimal
> >
> > Emil Renner Berthing (2):
> >   dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2042 uarts
> >   serial: 8250_dw: Add Sophgo SG2042 support
> >
> > Inochi Amaoto (1):
> >   dt-bindings: timer: Add Sophgo sg2042 clint
> >
> > Wang Chen (8):
> >   dt-bindings: vendor-prefixes: add milkv/sophgo
> >   dt-bindings: riscv: add sophgo sg2042 bindings
> >   dt-bindings: riscv: Add T-HEAD C920 compatibles
> >   dt-bindings: interrupt-controller: Add SOPHGO's SG2042 PLIC
> >   riscv: dts: add initial SOPHGO SG2042 SoC device tree
> >   riscv: dts: sophgo: add Milk-V Pioneer board device tree
> >   riscv: dts: sophgo: Add sophgo,sg2024-uart compatibles
> >   riscv: defconfig: enable SOPHGO SoC
> >
> > xiaoguang.xing (1):
> >   riscv: Add SOPHGO SOC family Kconfig support
>
> One thing on sending patchsets - you've not threaded this patchset,
> where each patch is a reply to the cover letter. This makes it more
> difficult to apply the series as a human & ~impossible for the
> automation to test correctly.
> Git should do this for you if run send-email on an entire directory,
> or you can pass the message-id of the cover letter with an argument.
> The first option is likely a lot easier for you...
>
> Thanks,
> Conor.

Conor, thanks for your input, I will correct the sending of patchsets
in next revision.