[12/12] riscv: defconfig: enable SOPHGO SoC

Message ID	20230915072653.118448-1-wangchen20@iscas.ac.cn (mailing list archive)
State	Superseded
Delegated to:	Conor Dooley
Headers	show Return-Path: <linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org> From: Wang Chen <unicornxw@gmail.com> To: linux-riscv@lists.infradead.org, conor@kernel.org, aou@eecs.berkeley.edu, krzysztof.kozlowski+dt@linaro.org, palmer@dabbelt.com, paul.walmsley@sifive.com, robh+dt@kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, jszhang@kernel.org, guoren@kernel.org, chao.wei@sophgo.com, xiaoguang.xing@sophgo.com, Wang Chen <wangchen20@iscas.ac.cn> Subject: [PATCH 12/12] riscv: defconfig: enable SOPHGO SoC Date: Fri, 15 Sep 2023 15:26:53 +0800 Message-Id: <20230915072653.118448-1-wangchen20@iscas.ac.cn> MIME-Version: 1.0 Precedence: list Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org
Series	Add Milk-V Pioneer RISC-V board support \| expand [00/12] Add Milk-V Pioneer RISC-V board support [01/12] riscv: Add SOPHGO SOC family Kconfig support [02/12] dt-bindings: vendor-prefixes: add milkv/sophgo [03/12] dt-bindings: riscv: add sophgo sg2042 bindings [04/12] dt-bindings: riscv: Add T-HEAD C920 compatibles [05/12] dt-bindings: interrupt-controller: Add SOPHGO's SG2042 PLIC [06/12] dt-bindings: timer: Add Sophgo sg2042 clint [07/12] riscv: dts: add initial SOPHGO SG2042 SoC device tree [08/12] riscv: dts: sophgo: add Milk-V Pioneer board device tree [09/12] dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2042 uarts [10/12] serial: 8250_dw: Add Sophgo SG2042 support [11/12] riscv: dts: sophgo: Add sophgo,sg2024-uart compatibles [12/12] riscv: defconfig: enable SOPHGO SoC

Message ID

20230915072653.118448-1-wangchen20@iscas.ac.cn (mailing list archive)

State

Superseded

Delegated to:

Conor Dooley

Headers

From: Wang Chen <unicornxw@gmail.com>
To: linux-riscv@lists.infradead.org,
	conor@kernel.org,
	aou@eecs.berkeley.edu,
	krzysztof.kozlowski+dt@linaro.org,
	palmer@dabbelt.com,
	paul.walmsley@sifive.com,
	robh+dt@kernel.org
Cc: devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	jszhang@kernel.org,
	guoren@kernel.org,
	chao.wei@sophgo.com,
	xiaoguang.xing@sophgo.com,
	Wang Chen <wangchen20@iscas.ac.cn>
Subject: [PATCH 12/12] riscv: defconfig: enable SOPHGO SoC
Date: Fri, 15 Sep 2023 15:26:53 +0800
Message-Id: <20230915072653.118448-1-wangchen20@iscas.ac.cn>
MIME-Version: 1.0
Precedence: list
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org>
Errors-To: 
 linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org

Series

Add Milk-V Pioneer RISC-V board support | expand

Commit Message

Chen Wang Sept. 15, 2023, 7:26 a.m. UTC

Enable SOPHGO SoC config in defconfig to allow the default
upstream kernel to boot on Milk-V Pioneer board.

Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>
---
 arch/riscv/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index ab86ec3b9eab..bf737cfa1d2c 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -32,6 +32,7 @@  CONFIG_SOC_SIFIVE=y
 CONFIG_SOC_STARFIVE=y
 CONFIG_ARCH_SUNXI=y
 CONFIG_SOC_VIRT=y
+CONFIG_ARCH_SOPHGO=y
 CONFIG_SMP=y
 CONFIG_HOTPLUG_CPU=y
 CONFIG_PM=y

[12/12] riscv: defconfig: enable SOPHGO SoC

Commit Message

Patch