| Message ID | 20210214175912.732946-1-f4bug@amsat.org (mailing list archive) |
|---|---|
| Headers | show |
| Series | target/mips: Reintroduce the R5900 CPU (with more testing) | expand |
On 2/14/21 6:58 PM, Philippe Mathieu-Daudé wrote: > The R5900 CPU was removed some time ago (frankly I don't remember > why). This series add it back, but to prove it works, we also add > testing at the end. > > The main motivation is to have MIPS R5900 coverage, but to be able > to run real world r5900 binaries, I had to implement more opcodes. > > 42 patches are a lot, but 3 are already queued in linux-user-for-6.0, > and the 11 last ones are pure testing. I suppose in next versions > I'll split the testing patches, but to show the final objective I > included them in here. > > I tagged it RFC because some parts because: > > - We'd rather not add yet another target, but we need the > ILP32-on-64bit ABI (o32 64-bit) > > - RDHWR glibc kludge for user-mode > > - Avocado patches are only here to show the final test. > They are useful for my set of tests, but not meant to > be merged in mainstream. > > - gitlab jobs are only here to show the tests work. > If the target is ever accepted, it would go in an already > existing job. > > I'm OK to maintain 64-bit o32 and the testing out of tree, but the > TCG opcodes are worthwhile review for mainstream. > > Note: there is a sign-extension bug somewhere but I can't find it: > > $ qemu-r5900o32el busybox free > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= > =A0total =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0used =C2=A0=C2=A0=C2= > =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0free =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0sha= > red =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0buffers > =C2=A0Mem: =C2=A0=C2=A0=C2=A0=C2=A0=C2=A03682012 =C2=A0=C2=A0=C2=A0=C2=A0= > =C2=A0=C2=A0812620 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A02869392 =C2=A0=C2=A0=C2=A0= > =C2=A0=C2=A01367556 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0321136 > Swap: =C2=A0=C2=A0=C2=A0=C2=A0=C2=A02095100 =C2=A0=C2=A0=C2=A0=C2=A0-149854= > 4 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A03593644 > Total: =C2=A0=C2=A0=C2=A0=C2=A0=C2=A05777112 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0-= > 685924 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A06463036 > > $ free # host > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= > =A0total =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0used =C2=A0=C2=A0=C2=A0=C2= > =A0=C2=A0=C2=A0=C2=A0free =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0shared =C2=A0buff/cac= > he =C2=A0=C2=A0available > Mem: =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A016264924 =C2=A0=C2=A0=C2=A0=C2=A093= > 23500 =C2=A0=C2=A0=C2=A0=C2=A02822500 =C2=A0=C2=A0=C2=A0=C2=A01377288 =C2=A0= > =C2=A0=C2=A0=C2=A04118924 =C2=A0=C2=A0=C2=A0=C2=A05149548 > Swap: =C2=A0=C2=A0=C2=A0=C2=A0=C2=A018872316 =C2=A0=C2=A0=C2=A011084368 =C2= > =A0=C2=A0=C2=A0=C2=A07787948 [Same but unescaped] Note: there is a sign-extension bug somewhere but I can't find it: $ qemu-r5900o32el busybox free total used free shared buffers Mem: 3682012 812620 2869392 1367556 321136 Swap: 2095100 -1498544 3593644 Total: 5777112 -685924 6463036 $ free # host total used free shared buff/cache available Mem: 16264924 9323500 2822500 1377288 4118924 5149548 Swap: 18872316 11084368 7787948 See the used swap: 11084368 = 0x00a92250 -1498544 = 0xffe92250 Regards, Phil.
On 2/14/21 6:58 PM, Philippe Mathieu-Daudé wrote: > The R5900 CPU was removed some time ago (frankly I don't remember > why). This series add it back, but to prove it works, we also add > testing at the end. > > The main motivation is to have MIPS R5900 coverage, but to be able > to run real world r5900 binaries, I had to implement more opcodes. > > 42 patches are a lot, but 3 are already queued in linux-user-for-6.0, > and the 11 last ones are pure testing. I suppose in next versions > I'll split the testing patches, but to show the final objective I > included them in here. > > I tagged it RFC because some parts because: > > - We'd rather not add yet another target, but we need the > ILP32-on-64bit ABI (o32 64-bit) > > - RDHWR glibc kludge for user-mode > > - Avocado patches are only here to show the final test. > They are useful for my set of tests, but not meant to > be merged in mainstream. > > - gitlab jobs are only here to show the tests work. > If the target is ever accepted, it would go in an already > existing job. > > I'm OK to maintain 64-bit o32 and the testing out of tree, but the > TCG opcodes are worthwhile review for mainstream. I forgot to mention, to debug this target with gdb (the various multimedia opcodes are not recognized by QEMU disas). I start QEMU listening for GDB with: $ qemu-r5900o32el -g 1234 ... Then start Debian's gdb-multiarch via Docker: $ docker run -it --rm -v /tmp:/tmp -u $UID --network=host \ registry.gitlab.com/qemu-project/qemu/qemu/debian10 \ gdb-multiarch -q \ --ex 'set architecture mips:5900' --ex 'set endian little' The target architecture is assumed to be mips:5900 The target is assumed to be little endian (gdb) Connect to QEMU on host: (gdb) target remote 172.17.0.1:1234 Opcodes are displayed properly: (gdb) x/20i 0x0002553c 0x2553c: pcpyld a1,a1,a1 0x25540: li a2,255 0x25544: andi t1,a0,0x7 0x25548: beqz t1,0x255fc 0x2554c: andi t1,a0,0xf 0x25550: lw t0,0(a0) 0x25554: addiu a0,a0,4 0x25558: pceqb t2,t0,zero 0x2555c: pceqb t3,t0,a1 0x25560: or t4,t3,t2 0x25564: pextlw t4,zero,t4 0x25568: beqz t4,0x255fc One limitation is we can not access the upper halves of the 128-bit general purpose registers :( [Maybe we can but I don't know how...] Regards, Phil.
On 2/14/21 6:58 PM, Philippe Mathieu-Daudé wrote: > The R5900 CPU was removed some time ago (frankly I don't remember > why). This series add it back, but to prove it works, we also add > testing at the end. > > The main motivation is to have MIPS R5900 coverage, but to be able > to run real world r5900 binaries, I had to implement more opcodes. > Philippe Mathieu-Daud=C3=A9 (40): > linux-user/mips64: Restore setup_frame() for o32 ABI > linux-user/mips64: Support o32 ABI syscalls > target/mips/translate: Make cpu_HI/LO registers public > target/mips: Promote 128-bit multimedia registers as global ones > target/mips: Rename 128-bit upper halve GPR registers > target/mips: Introduce gen_load_gpr_hi() / gen_store_gpr_hi() helpers > target/mips/translate: Use GPR move functions in gen_HILO1_tx79() Generic patches 3-7 applied to mips-next.
The R5900 CPU was removed some time ago (frankly I don't remember why). This series add it back, but to prove it works, we also add testing at the end. The main motivation is to have MIPS R5900 coverage, but to be able to run real world r5900 binaries, I had to implement more opcodes. 42 patches are a lot, but 3 are already queued in linux-user-for-6.0, and the 11 last ones are pure testing. I suppose in next versions I'll split the testing patches, but to show the final objective I included them in here. I tagged it RFC because some parts because: - We'd rather not add yet another target, but we need the ILP32-on-64bit ABI (o32 64-bit) - RDHWR glibc kludge for user-mode - Avocado patches are only here to show the final test. They are useful for my set of tests, but not meant to be merged in mainstream. - gitlab jobs are only here to show the tests work. If the target is ever accepted, it would go in an already existing job. I'm OK to maintain 64-bit o32 and the testing out of tree, but the TCG opcodes are worthwhile review for mainstream. Note: there is a sign-extension bug somewhere but I can't find it: $ qemu-r5900o32el busybox free =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0total =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0used =C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0free =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0sha= red =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0buffers =C2=A0Mem: =C2=A0=C2=A0=C2=A0=C2=A0=C2=A03682012 =C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0812620 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A02869392 =C2=A0=C2=A0=C2=A0= =C2=A0=C2=A01367556 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0321136 Swap: =C2=A0=C2=A0=C2=A0=C2=A0=C2=A02095100 =C2=A0=C2=A0=C2=A0=C2=A0-149854= 4 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A03593644 Total: =C2=A0=C2=A0=C2=A0=C2=A0=C2=A05777112 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0-= 685924 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A06463036 $ free # host =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0total =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0used =C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0free =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0shared =C2=A0buff/cac= he =C2=A0=C2=A0available Mem: =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A016264924 =C2=A0=C2=A0=C2=A0=C2=A093= 23500 =C2=A0=C2=A0=C2=A0=C2=A02822500 =C2=A0=C2=A0=C2=A0=C2=A01377288 =C2=A0= =C2=A0=C2=A0=C2=A04118924 =C2=A0=C2=A0=C2=A0=C2=A05149548 Swap: =C2=A0=C2=A0=C2=A0=C2=A0=C2=A018872316 =C2=A0=C2=A0=C2=A011084368 =C2= =A0=C2=A0=C2=A0=C2=A07787948 See the used swap: 11084368 =3D 0x00a92250 -1498544 =3D 0xffe92250 Fredrik Noring (2): linux-user/mips64: Support the n32 ABI for the R5900 tests/tcg/mips: Test user mode DMULT for the R5900 Philippe Mathieu-Daud=C3=A9 (40): linux-user/mips64: Restore setup_frame() for o32 ABI linux-user/mips64: Support o32 ABI syscalls target/mips/translate: Make cpu_HI/LO registers public target/mips: Promote 128-bit multimedia registers as global ones target/mips: Rename 128-bit upper halve GPR registers target/mips: Introduce gen_load_gpr_hi() / gen_store_gpr_hi() helpers target/mips/translate: Use GPR move functions in gen_HILO1_tx79() target/mips/tx79: Move MFHI1 / MFLO1 opcodes to decodetree target/mips/tx79: Move MTHI1 / MTLO1 opcodes to decodetree target/mips/translate: Simplify PCPYH using deposit_i64() target/mips/tx79: Move PCPYH opcode to decodetree target/mips/tx79: Move PCPYLD / PCPYUD opcodes to decodetree target/mips: Remove 'C790 Multimedia Instructions' dead code target/mips/tx79: Salvage instructions description comment target/mips/tx79: Introduce PAND/POR/PXOR/PNOR opcodes (parallel logic) target/mips/tx79: Introduce PSUB* opcodes (Parallel Subtract) target/mips/tx79: Introduce PEXTUW (Parallel Extend Upper from Word) target/mips/tx79: Introduce PEXTU[BHW] opcodes (Parallel Extend Lower) target/mips/tx79: Introduce PCEQ* opcodes (Parallel Compare for Equal) target/mips/tx79: Introduce PCGT* (Parallel Compare for Greater Than) target/mips/tx79: Introduce PPACW opcode (Parallel Pack to Word) target/mips/tx79: Introduce PINTEH (Parallel Interleave Even Halfword) target/mips/tx79: Introduce PEXE[HW] opcodes (Parallel Exchange Even) target/mips/tx79: Introduce PROT3W opcode (Parallel Rotate 3 Words) target/mips/tx79: Introduce LQ opcode (Load Quadword) target/mips/tx79: Introduce SQ opcode (Store Quadword) target/mips/translate: Make gen_rdhwr() public target/mips/tx79: Move RDHWR usermode kludge to trans_SQ() target/mips: Reintroduce the R5900 CPU default-configs: Support o32 ABI with R5900 64-bit MIPS CPU docker: Add gentoo-mipsr5900el-cross image gitlab-ci: Pass optional EXTRA_FILES when building docker images gitlab-ci: Build MIPS R5900 cross-toolchain (Gentoo based) tests/tcg: Add MIPS R5900 to arches filter gitlab-ci: Add job to test the MIPS r5900o32el target tests/acceptance: Extract QemuBaseTest from Test tests/acceptance: Make pick_default_qemu_bin() more generic tests/acceptance: Introduce QemuUserTest base class tests/acceptance: Test R5900 CPU with BusyBox from Sony PS2 gitlab-ci: Add job to run integration tests for the r5900o32el target docs/user/main.rst | 3 + .../targets/r5900o32el-linux-user.mak | 7 + linux-user/mips64/syscall_nr.h | 5 +- linux-user/mips64/target_elf.h | 3 + linux-user/mips64/target_signal.h | 4 + target/mips/cpu.h | 10 +- target/mips/translate.h | 14 + target/mips/tx79.decode | 76 ++ target/mips/translate.c | 862 +---------------- target/mips/tx79_translate.c | 877 ++++++++++++++++++ target/mips/txx9_translate.c | 20 + tests/tcg/mips/mipsn32r5900/dmult.c | 40 + target/mips/cpu-defs.c.inc | 59 ++ .gitlab-ci.d/containers.yml | 8 + .gitlab-ci.yml | 22 + MAINTAINERS | 1 + target/mips/meson.build | 5 + tests/acceptance/avocado_qemu/__init__.py | 56 +- tests/acceptance/mips_r5900_ps2.py | 69 ++ tests/docker/Makefile.include | 3 + .../gentoo-mipsr5900el-cross.docker | 35 + .../crossdev.conf | 5 + tests/tcg/configure.sh | 8 +- tests/tcg/mips/mipsn32r5900/Makefile | 25 + 24 files changed, 1375 insertions(+), 842 deletions(-) create mode 100644 default-configs/targets/r5900o32el-linux-user.mak create mode 100644 target/mips/tx79.decode create mode 100644 target/mips/tx79_translate.c create mode 100644 target/mips/txx9_translate.c create mode 100644 tests/tcg/mips/mipsn32r5900/dmult.c create mode 100644 tests/acceptance/mips_r5900_ps2.py create mode 100644 tests/docker/dockerfiles/gentoo-mipsr5900el-cross.docker create mode 100644 tests/docker/dockerfiles/gentoo-mipsr5900el-cross.docker.= d/crossdev.conf create mode 100644 tests/tcg/mips/mipsn32r5900/Makefile --=20 2.26.2