[RFC,v1,00/12] Arm: Enable GICv3 for AArch32

Message

Ayan Kumar Halder Oct. 21, 2022, 3:31 p.m. UTC

Hi All,

Please find the following patches to enable GICv3 for AArch32.
This is a pre-requisite to support Xen on Cortex-R52 (AArch32-v8R system)

Let me know your thoughts.

Ayan Kumar Halder (12):
  Arm: GICv3: Sysreg emulation is applicable for Aarch64 only
  Arm: GICv3: Move the macros to compute the affnity level to
    arm64/arm32
  Arm: GICv3: Enable vreg_reg64_* macros for AArch32
  Arm: GICv3: Emulate GICR_TYPER on AArch32
  Arm: GICv3: Emulate GICR_PENDBASER and GICR_PROPBASER on AArch32
  Arm: GICv3: Emulate of ICC_SGI1R on AArch32
  Arm: GICv3: Emulate ICH_LR<n>_EL2 on AArch32
  Arm: GICv3: Define ICH_AP0R<n> and ICH_AP1R<n> for AArch32
  Arm: GICv3: Define GIC registers for AArch32
  Arm: GICv3: Use ULL instead of UL for 64bits
  Arm: GICv3: Define macros to read/write 64 bit
  Arm: GICv3: Enable GICv3 for AArch32

 xen/arch/arm/Kconfig                       |   2 +-
 xen/arch/arm/gic-v3-its.c                  |  20 ++--
 xen/arch/arm/gic-v3-lpi.c                  |   8 +-
 xen/arch/arm/gic-v3.c                      | 132 ++++++++++-----------
 xen/arch/arm/include/asm/arm32/io.h        |   4 +
 xen/arch/arm/include/asm/arm32/processor.h |  10 ++
 xen/arch/arm/include/asm/arm32/sysregs.h   |  80 +++++++++++++
 xen/arch/arm/include/asm/arm64/processor.h |  13 ++
 xen/arch/arm/include/asm/arm64/sysregs.h   |   7 +-
 xen/arch/arm/include/asm/cpufeature.h      |   1 +
 xen/arch/arm/include/asm/gic_v3_defs.h     |  24 ++--
 xen/arch/arm/include/asm/gic_v3_its.h      |   2 +-
 xen/arch/arm/include/asm/processor.h       |  14 ---
 xen/arch/arm/include/asm/vreg.h            |  23 ++--
 xen/arch/arm/vgic-v3-its.c                 |  17 +--
 xen/arch/arm/vgic-v3.c                     |  26 ++--
 16 files changed, 242 insertions(+), 141 deletions(-)