Message ID | 20221021153128.44226-10-ayankuma@amd.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Arm: Enable GICv3 for AArch32 | expand |
Hi Ayan, On 21/10/2022 16:31, Ayan Kumar Halder wrote: > Refer "Arm IHI 0069H ID020922" > 12.5.23 ICC_SGI1R, Interrupt Controller Software Generated Interrupt > Group 1 Register > 12.5.12 ICC_HSRE, Interrupt Controller Hyp System Register Enable register > 12.7.10 ICH_VTR, Interrupt Controller VGIC Type Register > 12.7.5 ICH_HCR, Interrupt Controller Hyp Control Register > 12.5.20 ICC_PMR, Interrupt Controller Interrupt Priority Mask Register > 12.5.24 ICC_SRE, Interrupt Controller System Register Enable register > 12.5.7 ICC_DIR, Interrupt Controller Deactivate Interrupt Register > 12.5.9 ICC_EOIR1, Interrupt Controller End Of Interrupt Register 1 > 12.5.14 ICC_IAR1, Interrupt Controller Interrupt Acknowledge Register 1 > 12.5.5 ICC_BPR1, Interrupt Controller Binary Point Register 1 > 12.5.6 ICC_CTLR, Interrupt Controller Control Register > 12.5.16 ICC_IGRPEN1, Interrupt Controller Interrupt Group 1 Enable register > 12.7.9 ICH_VMCR, Interrupt Controller Virtual Machine Control Register > > Signed-off-by: Ayan Kumar Halder <ayankuma@amd.com> > --- > xen/arch/arm/include/asm/arm32/sysregs.h | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/xen/arch/arm/include/asm/arm32/sysregs.h b/xen/arch/arm/include/asm/arm32/sysregs.h > index 693da22324..d2c5a115f9 100644 > --- a/xen/arch/arm/include/asm/arm32/sysregs.h > +++ b/xen/arch/arm/include/asm/arm32/sysregs.h Same as the previous two patches. This should be defined in cpregs.h > @@ -129,6 +129,22 @@ > #define ICH_AP1R2_EL2 __AP1Rx_EL2(2) > #define ICH_AP1R3_EL2 __AP1Rx_EL2(3) > > +#define ICC_SGI1R_EL1 p15,0,c12 > + > +#define ICC_SRE_EL2 p15,4,c12,c9,5 > +#define ICH_VTR_EL2 p15,4,c12,c11,1 > +#define ICH_HCR_EL2 p15,4,c12,c11,0 > + > +#define ICC_PMR_EL1 p15,0,c4,c6,0 > +#define ICC_SRE_EL1 p15,0,c12,c12,5 > +#define ICC_DIR_EL1 p15,0,c12,c11,1 > +#define ICC_EOIR1_EL1 p15,0,c12,c12,1 > +#define ICC_IAR1_EL1 p15,0,c12,c12,0 > +#define ICC_BPR1_EL1 p15,0,c12,c12,3 > +#define ICC_CTLR_EL1 p15,0,c12,c12,4 > +#define ICC_IGRPEN1_EL1 p15,0,c12,c12,7 > +#define ICH_VMCR_EL2 p15,4,c12,c11,7 > + > #endif /* __ASSEMBLY__ */ > > #endif /* __ASM_ARM_ARM32_SYSREGS_H */ Cheers,
diff --git a/xen/arch/arm/include/asm/arm32/sysregs.h b/xen/arch/arm/include/asm/arm32/sysregs.h index 693da22324..d2c5a115f9 100644 --- a/xen/arch/arm/include/asm/arm32/sysregs.h +++ b/xen/arch/arm/include/asm/arm32/sysregs.h @@ -129,6 +129,22 @@ #define ICH_AP1R2_EL2 __AP1Rx_EL2(2) #define ICH_AP1R3_EL2 __AP1Rx_EL2(3) +#define ICC_SGI1R_EL1 p15,0,c12 + +#define ICC_SRE_EL2 p15,4,c12,c9,5 +#define ICH_VTR_EL2 p15,4,c12,c11,1 +#define ICH_HCR_EL2 p15,4,c12,c11,0 + +#define ICC_PMR_EL1 p15,0,c4,c6,0 +#define ICC_SRE_EL1 p15,0,c12,c12,5 +#define ICC_DIR_EL1 p15,0,c12,c11,1 +#define ICC_EOIR1_EL1 p15,0,c12,c12,1 +#define ICC_IAR1_EL1 p15,0,c12,c12,0 +#define ICC_BPR1_EL1 p15,0,c12,c12,3 +#define ICC_CTLR_EL1 p15,0,c12,c12,4 +#define ICC_IGRPEN1_EL1 p15,0,c12,c12,7 +#define ICH_VMCR_EL2 p15,4,c12,c11,7 + #endif /* __ASSEMBLY__ */ #endif /* __ASM_ARM_ARM32_SYSREGS_H */
Refer "Arm IHI 0069H ID020922" 12.5.23 ICC_SGI1R, Interrupt Controller Software Generated Interrupt Group 1 Register 12.5.12 ICC_HSRE, Interrupt Controller Hyp System Register Enable register 12.7.10 ICH_VTR, Interrupt Controller VGIC Type Register 12.7.5 ICH_HCR, Interrupt Controller Hyp Control Register 12.5.20 ICC_PMR, Interrupt Controller Interrupt Priority Mask Register 12.5.24 ICC_SRE, Interrupt Controller System Register Enable register 12.5.7 ICC_DIR, Interrupt Controller Deactivate Interrupt Register 12.5.9 ICC_EOIR1, Interrupt Controller End Of Interrupt Register 1 12.5.14 ICC_IAR1, Interrupt Controller Interrupt Acknowledge Register 1 12.5.5 ICC_BPR1, Interrupt Controller Binary Point Register 1 12.5.6 ICC_CTLR, Interrupt Controller Control Register 12.5.16 ICC_IGRPEN1, Interrupt Controller Interrupt Group 1 Enable register 12.7.9 ICH_VMCR, Interrupt Controller Virtual Machine Control Register Signed-off-by: Ayan Kumar Halder <ayankuma@amd.com> --- xen/arch/arm/include/asm/arm32/sysregs.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)