Show patches with: Submitter = Biju Das       |   223 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[01/16] clk: renesas: r9a09g011: Add USB clock and reset entries [01/16] clk: renesas: r9a09g011: Add USB clock and reset entries - 1 - --- 2022-12-12 Biju Das Awaiting Upstream
[06/10] dt-bindings: clock: renesas: cpg-mssr: Document r8a7744 binding Untitled series #17507 - 3 - --- 2018-09-11 Biju Das Awaiting Upstream
[06/12] clk: renesas: cpg-mssr: Add r8a77470 support - 1 - --- 2018-03-27 Biju Das Changes Requested
[08/10] clk: renesas: r8a7743: Add r8a7744 support Untitled series #17507 - 3 - --- 2018-09-11 Biju Das Awaiting Upstream
[1/2] clk: renesas: r9a07g044: Add GPT clock and reset entry Add GPT and POEG clock and reset entries - 1 - --- 2022-05-10 Biju Das Awaiting Upstream
[1/2] clk: renesas: r9a07g044: Add IA55_CLK and DMAC_ACLK [1/2] clk: renesas: r9a07g044: Add IA55_CLK and DMAC_ACLK - - - --- 2021-09-22 Biju Das Superseded
[1/2] clk: renesas: r9a07g044: Rename CLK_PLL2_DIV16 and CLK_PLL2_DIV20 macros [1/2] clk: renesas: r9a07g044: Rename CLK_PLL2_DIV16 and CLK_PLL2_DIV20 macros - 2 - --- 2021-11-10 Biju Das Awaiting Upstream
[1/2] clk: vc5: Use i2c_get_match_data() instead of device_get_match_data() Use i2c_get_match_data() - 2 - --- 2023-07-16 Biju Das Changes Requested
[1/2] drivers: clk: renesas: rzg2l-cpg: Add SDHI clk mux support Add SDHI clock and reset entries in cpg driver - 1 - --- 2021-08-04 Biju Das Awaiting Upstream
[1/3] dt-bindings: clock: versaclock3: Document clock-output-names Fix Versa3 clock mapping - - - --- 2023-08-02 Biju Das Superseded
[1/4] clk: renesas: r9a07g043: Add clock and reset entries for SPI Multi I/O Bus Controller Add RZ/G2UL CLK and Reset entries for RSPI,TSU,ADC and SPI Multi IO Bus Controller - 1 - --- 2022-05-01 Biju Das Awaiting Upstream
[1/4] clk: renesas: r9a07g043: Add GPIO clock and reset entries Add GPIO,ETHERNET and SDHI Clock/Reset entries for RZ/G2UL - 2 - --- 2022-03-15 Biju Das Awaiting Upstream
[1/4] clk: renesas: rzg2l: Add CPG_PL1_DDIV macro Add OPP table for RZ/G2L SoC - 1 - --- 2021-11-11 Biju Das Superseded
[1/5] clk: renesas: r9a07g044: Add TSU clock and reset entries [1/5] clk: renesas: r9a07g044: Add TSU clock and reset entries - 1 - --- 2021-11-16 Biju Das Superseded
[1/5] clk: renesas: r9a09g011: Add PWM clock entries Add RZ/V2{M, MA} driver support - - - --- 2022-11-18 Biju Das Changes Requested
[1/5] clk: versaclock3: Update vc3_get_div() to avoid divide by zero Versa3 clock driver enhancements - - - --- 2023-11-22 Biju Das Accepted
[1/6] clk: renesas: r9a07g043: Add I2C clocks/resets Add RZ/G2UL CLK and Reset entries for I2C,SSI,USB,CANFD,OSTM and WDT - 1 - --- 2022-04-25 Biju Das Awaiting Upstream
[1/6] clk: renesas: r9a07g044: Rename CLK_PLL3_DIV4 macro Add Mali-G31 GPU support for RZ/G2L SoC - 2 - --- 2021-12-03 Biju Das Awaiting Upstream
[1/6] clk: renesas: r9a09g011: Add TIM clock and reset entries Add RZ/V2M Compare-Match Timer (TIM) support - 1 - --- 2022-12-05 Biju Das Superseded
[1/9] clk: renesas: rzg2l: Add FOUTPOSTDIV clk support Add RZ/G2L Display clock support - 1 - --- 2022-03-18 Biju Das Changes Requested
[2/2] clk: renesas: r9a07g044: Add OSTM clock and reset entries [1/2] clk: renesas: r9a07g044: Rename CLK_PLL2_DIV16 and CLK_PLL2_DIV20 macros - 2 - --- 2021-11-10 Biju Das Awaiting Upstream
[2/2] clk: renesas: r9a07g044: Add POEG clock and reset entries Add GPT and POEG clock and reset entries - 1 - --- 2022-05-10 Biju Das Awaiting Upstream
[2/2] clk: renesas: rzg2l: Fix clk status function [1/2] clk: renesas: r9a07g044: Add IA55_CLK and DMAC_ACLK - - - --- 2021-09-22 Biju Das Changes Requested
[2/2] clk: vc7: Use i2c_get_match_data() instead of device_get_match_data() Use i2c_get_match_data() - 2 - --- 2023-07-16 Biju Das Changes Requested
[2/2] drivers: clk: renesas: r9a07g044-cpg: Add SDHI clock and reset entries Add SDHI clock and reset entries in cpg driver - 1 - --- 2021-08-04 Biju Das Awaiting Upstream
[2/3] clk: vc3: Fix output clock mapping Fix Versa3 clock mapping - - - --- 2023-08-02 Biju Das Superseded
[2/4] clk: renesas: r9a07g043: Add ethernet clock sources Add GPIO,ETHERNET and SDHI Clock/Reset entries for RZ/G2UL - 2 - --- 2022-03-15 Biju Das Awaiting Upstream
[2/4] clk: renesas: r9a07g043: Add RSPI clock and reset entries Add RZ/G2UL CLK and Reset entries for RSPI,TSU,ADC and SPI Multi IO Bus Controller - 1 - --- 2022-05-01 Biju Das Awaiting Upstream
[2/4] clk: renesas: r9a07g044: Change core clock "I" from DEF_FIXED->DEF_DIV Add OPP table for RZ/G2L SoC - 1 - --- 2021-11-11 Biju Das Superseded
[2/5] clk: versaclock3: Avoid unnecessary padding Versa3 clock driver enhancements - - - --- 2023-11-22 Biju Das Accepted
[2/5] drivers: clk: renesas: r9a07g044-cpg: Add DMAC clocks Untitled series #498813 - 2 - --- 2021-06-11 Biju Das Awaiting Upstream
[2/5] drivers: clk: renesas: r9a07g044-cpg: Add I2C Clocks Untitled series #499073 - 2 - --- 2021-06-11 Biju Das Awaiting Upstream
[2/6] clk: renesas: r9a07g043: Add SSIF-2 clock and reset entries Add RZ/G2UL CLK and Reset entries for I2C,SSI,USB,CANFD,OSTM and WDT - 1 - --- 2022-04-25 Biju Das Awaiting Upstream
[2/6] clk: renesas: r9a07g044: Add mux and divider for G clock Add Mali-G31 GPU support for RZ/G2L SoC - 2 - --- 2021-12-03 Biju Das Awaiting Upstream
[2/6] drivers: clk: renesas: r9a07g044-cpg: Add USB clocks Untitled series #498921 - 1 - --- 2021-06-11 Biju Das Changes Requested
[2/7] drivers: clk: renesas: renesas-rzg2l-cpg: Add multi clock PM support Update clock definitions - 2 - --- 2021-06-18 Biju Das Superseded
[2/9] clk: renesas: rzg2l: Add PLL5_4 clk mux support Add RZ/G2L Display clock support - 1 - --- 2022-03-18 Biju Das Changes Requested
[2/9] drivers: clk: renesas: r9a07g044-cpg: Add SSIF-2 clock and reset entries Untitled series #510143 - 2 - --- 2021-07-02 Biju Das Awaiting Upstream
[3/4] clk: renesas: r9a07g043: Add GbEthernet clock/reset Add GPIO,ETHERNET and SDHI Clock/Reset entries for RZ/G2UL - 2 - --- 2022-03-15 Biju Das Awaiting Upstream
[3/4] clk: renesas: r9a07g043: Add TSU clock and reset entry Add RZ/G2UL CLK and Reset entries for RSPI,TSU,ADC and SPI Multi IO Bus Controller - 1 - --- 2022-05-01 Biju Das Awaiting Upstream
[3/5] clk: renesas: r8a774c0: Add TMU clock Untitled series #74629 - - - --- 2019-02-01 Biju Das Changes Requested
[3/5] clk: versaclock3: Use u8 return type for get_parent() callback Versa3 clock driver enhancements - - - --- 2023-11-22 Biju Das Accepted
[3/6] clk: renesas: r9a07g043: Add USB clocks/resets Add RZ/G2UL CLK and Reset entries for I2C,SSI,USB,CANFD,OSTM and WDT - 1 - --- 2022-04-25 Biju Das Awaiting Upstream
[3/6] clk: renesas: r9a07g044: Add GPU clock and reset entries Add Mali-G31 GPU support for RZ/G2L SoC - 2 - --- 2021-12-03 Biju Das Awaiting Upstream
[3/7] drivers: clk: renesas: r9a07g044-cpg: Update {GIC,IA55,SCIF} clock entries Update clock definitions - 1 - --- 2021-06-18 Biju Das Changes Requested
[3/9] clk: renesas: rzg2l: Add DSI divider clk support Add RZ/G2L Display clock support - - - --- 2022-03-18 Biju Das Changes Requested
[4/4] clk: renesas: r9a07g043: Add clock and reset entries for ADC Add RZ/G2UL CLK and Reset entries for RSPI,TSU,ADC and SPI Multi IO Bus Controller - 1 - --- 2022-05-01 Biju Das Awaiting Upstream
[4/4] clk: renesas: r9a07g043: Add SDHI clock and reset entries Add GPIO,ETHERNET and SDHI Clock/Reset entries for RZ/G2UL - 2 - --- 2022-03-15 Biju Das Awaiting Upstream
[4/5] clk: versaclock3: Add missing space between ')' and '{' Versa3 clock driver enhancements - - - --- 2023-11-22 Biju Das Accepted
[4/6] clk: renesas: r9a07g043: Add clock and reset entries for CANFD Add RZ/G2UL CLK and Reset entries for I2C,SSI,USB,CANFD,OSTM and WDT - 1 - --- 2022-04-25 Biju Das Awaiting Upstream
[4/7] dt-bindings: clock: renesas: Document RZ/G2UL SoC Add Renesas RZ/G2UL Type-1 {SoC,SMARC EVK} support - 1 - --- 2022-03-03 Biju Das Superseded
[4/9] clk: renesas: r9a07g044: Add M1 clock support Add RZ/G2L Display clock support - 1 - --- 2022-03-18 Biju Das Superseded
[5/5] clk: renesas: cpg-mssr: Add r8a774a1 support Untitled series #3015 - 1 - --- 2018-07-30 Biju Das Changes Requested
[5/5] clk: versaclock3: Drop ret variable Versa3 clock driver enhancements - - - --- 2023-11-22 Biju Das Accepted
[5/6] clk: renesas: r9a07g043: Add OSTM clock and reset entries Add RZ/G2UL CLK and Reset entries for I2C,SSI,USB,CANFD,OSTM and WDT - 1 - --- 2022-04-25 Biju Das Awaiting Upstream
[5/7] clk: renesas: Add support for RZ/G2UL SoC Add Renesas RZ/G2UL Type-1 {SoC,SMARC EVK} support - 1 - --- 2022-03-03 Biju Das Superseded
[5/7] drivers: clk: renesas: r9a07g044-cpg: Add I2C Clocks Update clock definitions - 1 - --- 2021-06-18 Biju Das Superseded
[5/8] dt-bindings: clock: renesas: cpg-mssr: Document r8a774b1 binding Add RZ/G2N SYSC/RST/Clock/PFC support - - - --- 2019-09-17 Biju Das Awaiting Upstream
[5/9] clk: renesas: r9a07g044: Add {M2, M2_DIV2} Clocks support Add RZ/G2L Display clock support - 1 - --- 2022-03-18 Biju Das Superseded
[6/6] clk: renesas: r9a07g043: Add WDT clock and reset entries Add RZ/G2UL CLK and Reset entries for I2C,SSI,USB,CANFD,OSTM and WDT - 1 - --- 2022-04-25 Biju Das Awaiting Upstream
[6/7] drivers: clk: renesas: r9a07g044-cpg: Add DMAC clocks Update clock definitions - 1 - --- 2021-06-18 Biju Das Superseded
[6/8] clk: renesas: cpg-mssr: Add r8a774b1 support Add RZ/G2N SYSC/RST/Clock/PFC support - - - --- 2019-09-17 Biju Das Changes Requested
[6/9] clk: renesas: r9a07g044: Add M3 Clock support Add RZ/G2L Display clock support - 1 - --- 2022-03-18 Biju Das Superseded
[7/9] clk: renesas: r9a07g044: Add M4 Clock support Add RZ/G2L Display clock support - 1 - --- 2022-03-18 Biju Das Superseded
[8/9] clk: renesas: r9a07g044: Add LCDC clock and reset entries Add RZ/G2L Display clock support - 1 - --- 2022-03-18 Biju Das Superseded
[9/9] clk: renesas: r9a07g044: Add DSI clock and reset entries Add RZ/G2L Display clock support - 1 - --- 2022-03-18 Biju Das Superseded
[net-next,02/18] drivers: clk: renesas: rzg2l-cpg: Add support to handle MUX clocks Untitled series #519775 - 2 - --- 2021-07-22 Biju Das Not Applicable
[net-next,03/18] drivers: clk: renesas: r9a07g044-cpg: Add ethernet clock sources Untitled series #519775 - 1 - --- 2021-07-22 Biju Das Changes Requested
[net-next,04/18] drivers: clk: renesas: r9a07g044-cpg: Add GbEthernet clock/reset Untitled series #519775 - 1 - --- 2021-07-22 Biju Das Changes Requested
[RFC,01/28] clk: renesas: rzg2l: Add FOUTPOSTDIV clk support Add RZ/G2L Display support - - - --- 2022-01-12 Biju Das RFC
[RFC,02/28] clk: renesas: rzg2l: Add PLL5_4 clk mux support Add RZ/G2L Display support - - - --- 2022-01-12 Biju Das RFC
[RFC,03/28] clk: renesas: rzg2l: Add DSI divider clk support Add RZ/G2L Display support - - - --- 2022-01-12 Biju Das RFC
[RFC,04/28] clk: renesas: r9a07g044: Add M1 clock support Add RZ/G2L Display support - 1 - --- 2022-01-12 Biju Das RFC
[RFC,05/28] clk: renesas: r9a07g044: Add {M2, M2_DIV2} Clocks support Add RZ/G2L Display support - 1 - --- 2022-01-12 Biju Das RFC
[RFC,06/28] clk: renesas: r9a07g044: Add M3 Clock support Add RZ/G2L Display support - 1 - --- 2022-01-12 Biju Das RFC
[RFC,07/28] clk: renesas: r9a07g044: Add M4 Clock support Add RZ/G2L Display support - 1 - --- 2022-01-12 Biju Das RFC
[RFC,08/28] clk: renesas: r9a07g044: Add LCDC clock and reset entries Add RZ/G2L Display support - 1 - --- 2022-01-12 Biju Das RFC
[RFC,09/28] clk: renesas: r9a07g044: Add DSI clock and reset entries Add RZ/G2L Display support - 1 - --- 2022-01-12 Biju Das RFC
[RFC,1/3] clk: Add clk_disable_unprepare_sync() Add clk_disable_unprepare_sync() - - - --- 2024-01-31 Biju Das RFC
[RFC,1/3] dt-bindings: clock: Add Renesas versa3 clock generator bindings Add Versa3 clock generator support - 2 - --- 2023-02-20 Biju Das Changes Requested
[RFC,1/4] clk: renesas: rzg2l: Add support for watchdog reset selection [RFC,1/4] clk: renesas: rzg2l: Add support for watchdog reset selection - - - --- 2021-11-04 Biju Das Superseded
[RFC,1/8] clk: renesas: r9a07g044: Add MTU3a clock and reset entry Add RZ/G2L MTU3a MFD and Counter driver - - - --- 2022-09-26 Biju Das Awaiting Upstream
[RFC,2/3] clk: renesas: rzg2l: Add disable_sync() callback Add clk_disable_unprepare_sync() - - - --- 2024-01-31 Biju Das RFC
[RFC,2/3] drivers: clk: Add support for versa3 clock driver Add Versa3 clock generator support - - - --- 2023-02-20 Biju Das Changes Requested
[RFC,3/3] arm64: dts: renesas: rzg2l-smarc: Use versa3 clk for audio mclk Add Versa3 clock generator support - - - --- 2023-02-20 Biju Das Not Applicable
[RFC,3/4] clk: renesas: r9a07g044: Add WDT clock and reset entries [RFC,1/4] clk: renesas: rzg2l: Add support for watchdog reset selection - 1 - --- 2021-11-04 Biju Das Awaiting Upstream
[v1,1/3] clk: renesas: rzg2l: Add support for watchdog reset selection [v1,1/3] clk: renesas: rzg2l: Add support for watchdog reset selection - - - --- 2021-11-11 Biju Das Superseded
[v2,01/11] drivers: clk: renesas: renesas-rzg2l-cpg: Add multi clock PM support Update clock definitions - 2 - --- 2021-06-24 Biju Das Superseded
[v2,02/11] drivers: clk: renesas: r9a07g044-cpg: Add USB clocks Untitled series #504213 - 1 - --- 2021-06-21 Biju Das Awaiting Upstream
[v2,02/11] drivers: clk: renesas: r9a07g044-cpg: Rename divider table Update clock definitions - 2 - --- 2021-06-24 Biju Das Superseded
[v2,03/11] drivers: clk: renesas: r9a07g044-cpg: Fix P1 Clock Update clock definitions - 2 - --- 2021-06-24 Biju Das Superseded
[v2,04/11] drivers: clk: renesas: r9a07g044-cpg: Add P2 Clock support Update clock definitions - 2 - --- 2021-06-24 Biju Das Superseded
[v2,06/11] drivers: clk: renesas: renesas-rzg2l-cpg: Separate reset from module clocks Update clock definitions - 1 - --- 2021-06-24 Biju Das Superseded
[v2,07/11] drivers: clk: renesas: r9a07g044-cpg: Update {GIC,IA55,SCIF} clock/reset entries Update clock definitions - 1 - --- 2021-06-24 Biju Das Superseded
[v2,09/11] drivers: clk: renesas: r9a07g044-cpg: Add I2C clocks/resets Update clock definitions - 2 - --- 2021-06-24 Biju Das Superseded
[v2,1/2] clk: renesas: r9a07g044: Add IA55_CLK and DMAC_ACLK [v2,1/2] clk: renesas: r9a07g044: Add IA55_CLK and DMAC_ACLK - 1 - --- 2021-09-22 Biju Das Awaiting Upstream
[v2,1/2] clk: vc5: Use i2c_get_match_data() instead of device_get_match_data() Use i2c_get_match_data() for versa{5,7} drivers - 3 - --- 2023-07-21 Biju Das Accepted
[v2,1/2] drivers: clk: renesas: rzg2l-cpg: Add SDHI clk mux support Add SDHI clock and reset entries in cpg driver - 2 - --- 2021-10-07 Biju Das Awaiting Upstream
[v2,1/3] clk: renesas: rzg2l: Add support for watchdog reset selection [v2,1/3] clk: renesas: rzg2l: Add support for watchdog reset selection - - - --- 2021-11-11 Biju Das Changes Requested
[v2,1/3] clk: Update API documentation related to clock disable Add clk_poll_disable_unprepare() - - - --- 2024-02-20 Biju Das Superseded
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