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[RFC,v1,068/256] cl8k: add e2p.h

Message ID 20210617160223.160998-69-viktor.barna@celeno.com (mailing list archive)
State RFC
Delegated to: Kalle Valo
Headers show
Series wireless: cl8k driver for Celeno IEEE 802.11ax devices | expand

Commit Message

Viktor Barna June 17, 2021, 3:59 p.m. UTC 
From: Viktor Barna <viktor.barna@celeno.com>

(Part of the split. Please, take a look at the cover letter for more
details).

Signed-off-by: Viktor Barna <viktor.barna@celeno.com>
---
 drivers/net/wireless/celeno/cl8k/e2p.h | 166 +++++++++++++++++++++++++
 1 file changed, 166 insertions(+)
 create mode 100644 drivers/net/wireless/celeno/cl8k/e2p.h

--
2.30.0
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Patch

diff --git a/drivers/net/wireless/celeno/cl8k/e2p.h b/drivers/net/wireless/celeno/cl8k/e2p.h
new file mode 100644
index 000000000000..74ec66dfe277
--- /dev/null
+++ b/drivers/net/wireless/celeno/cl8k/e2p.h
@@ -0,0 +1,166 @@ 
+/* SPDX-License-Identifier: MIT */
+/* Copyright(c) 2019-2021, Celeno Communications Ltd. */
+
+#ifndef CL_E2P_H
+#define CL_E2P_H
+
+#include <linux/types.h>
+#include <net/cfg80211.h>
+
+
+#include "def.h"
+#include "fem_common.h"
+
+/**
+ * EEPROM abstraction layer
+ */
+
+#define SERIAL_NUMBER_SIZE 32
+
+enum eeprom_flavor {
+       EEPROM_FLAVOR_CL80X0,
+       EEPROM_FLAVOR_CL80X6,
+};
+
+struct eeprom_hw {
+       u8 reserved[96];
+} __packed;
+
+struct eeprom_general {
+       u8 version;
+       u8 flavor;
+       u8 mac_address[6];
+       u8 temp_diff; /* Default value TEMP_DIFF_INVALID = 0x7F */
+       u8 serial_number[SERIAL_NUMBER_SIZE];
+       u8 pwr_table_id[2];
+       u8 reserved[53];
+} __attribute__((__packed__));
+
+struct eeprom_fem {
+       u8 wiring_id;
+       u16 fem_lut[FEM_TYPE_MAX];
+       u32 platform_id;
+       u8 reserved[19];
+} __packed;
+
+struct eeprom_phy_calib {
+       s8 pow;
+       s8 offset;
+       s8 tmp;
+} __packed;
+
+#define BIT_MAP_SIZE   20
+#define NUM_OF_PIVOTS  20
+#define NUM_PIVOT_PHYS (MAX_ANTENNAS * NUM_OF_PIVOTS)
+
+struct eeprom_calib {
+       u16 freq_offset;
+       u8 chan_bmp[BIT_MAP_SIZE];
+       struct eeprom_phy_calib phy_calib[NUM_PIVOT_PHYS];
+} __packed;
+
+struct eeprom {
+       struct eeprom_hw hw;
+       struct eeprom_general general;
+       struct eeprom_fem fem;
+       struct eeprom_calib calib;
+} __packed;
+
+enum {
+       ADDR_HW = offsetof(struct eeprom, hw),
+       ADDR_HW_RESERVED = ADDR_HW + offsetof(struct eeprom_hw, reserved),
+
+       ADDR_GEN = offsetof(struct eeprom, general),
+       ADDR_GEN_VERSION = ADDR_GEN + offsetof(struct eeprom_general, version),
+       ADDR_GEN_FLAVOR = ADDR_GEN + offsetof(struct eeprom_general, flavor),
+       ADDR_GEN_MAC_ADDR = ADDR_GEN + offsetof(struct eeprom_general, mac_address),
+       ADDR_GEN_TEMP_DIFF = ADDR_GEN + offsetof(struct eeprom_general, temp_diff),
+       ADDR_GEN_SERIAL_NUMBER = ADDR_GEN + offsetof(struct eeprom_general, serial_number),
+       ADDR_GEN_PWR_TABLE_ID = ADDR_GEN + offsetof(struct eeprom_general, pwr_table_id),
+       ADDR_GEN_RESERVED = ADDR_GEN + offsetof(struct eeprom_general, reserved),
+
+       ADDR_FEM = offsetof(struct eeprom, fem),
+       ADDR_FEM_WIRING_ID = ADDR_FEM + offsetof(struct eeprom_fem, wiring_id),
+       ADDR_FEM_LUT = ADDR_FEM + offsetof(struct eeprom_fem, fem_lut),
+       ADDR_FEM_PLATFORM_ID = ADDR_FEM + offsetof(struct eeprom_fem, platform_id),
+       ADDR_FEM_RESERVED = ADDR_FEM + offsetof(struct eeprom_fem, reserved),
+
+       ADDR_CALIB = offsetof(struct eeprom, calib),
+       ADDR_CALIB_FREQ_OFFSET = ADDR_CALIB + offsetof(struct eeprom_calib, freq_offset),
+       ADDR_CALIB_CHAN_BMP = ADDR_CALIB + offsetof(struct eeprom_calib, chan_bmp),
+       ADDR_CALIB_PHY = ADDR_CALIB + offsetof(struct eeprom_calib, phy_calib),
+
+       SIZE_HW = sizeof(struct eeprom_hw),
+       SIZE_HW_RESERVED = ADDR_GEN - ADDR_HW_RESERVED,
+
+       SIZE_GEN = sizeof(struct eeprom_general),
+       SIZE_GEN_VERSION = ADDR_GEN_FLAVOR - ADDR_GEN_VERSION,
+       SIZE_GEN_FLAVOR = ADDR_GEN_MAC_ADDR - ADDR_GEN_FLAVOR,
+       SIZE_GEN_MAC_ADDR = ADDR_GEN_TEMP_DIFF - ADDR_GEN_MAC_ADDR,
+       SIZE_GEN_TEMP_DIFF = ADDR_GEN_SERIAL_NUMBER - ADDR_GEN_TEMP_DIFF,
+       SIZE_GEN_SERIAL_NUMBER = ADDR_GEN_PWR_TABLE_ID - ADDR_GEN_SERIAL_NUMBER,
+       SIZE_GEN_PWR_TABLE_ID = ADDR_GEN_RESERVED - ADDR_GEN_PWR_TABLE_ID,
+       SIZE_GEN_RESERVED = ADDR_FEM - ADDR_GEN_RESERVED,
+
+       SIZE_FEM = sizeof(struct eeprom_fem),
+       SIZE_FEM_WIRING_ID = ADDR_FEM_LUT - ADDR_FEM_WIRING_ID,
+       SIZE_FEM_LUT = ADDR_FEM_PLATFORM_ID - ADDR_FEM_LUT,
+       SIZE_FEM_PLATFORM_ID = ADDR_FEM_RESERVED - ADDR_FEM_PLATFORM_ID,
+
+       SIZE_CALIB = sizeof(struct eeprom_calib),
+       SIZE_CALIB_FREQ_OFFSET = ADDR_CALIB_CHAN_BMP - ADDR_CALIB_FREQ_OFFSET,
+       SIZE_CALIB_CHAN_BMP = ADDR_CALIB_PHY - ADDR_CALIB_CHAN_BMP,
+       SIZE_CALIB_PHY = sizeof(struct eeprom_phy_calib) * NUM_PIVOT_PHYS,
+
+       EEPROM_NUM_BYTES = sizeof(struct eeprom),
+       EEPROM_LAST_BYTE = EEPROM_NUM_BYTES - 1,
+};
+
+struct cl_e2p_get_reply {
+       u8 e2p_mode;
+       u8 e2p_data[];
+};
+
+struct cl_chip;
+
+int cl_e2p_init(struct cl_chip *chip);
+void cl_e2p_close(struct cl_chip *chip);
+int cl_e2p_write(struct cl_chip *chip, u8 *data, u16 size, u16 addr);
+int cl_e2p_read(struct cl_chip *chip, u8 *data, u16 size, u16 addr);
+int cl_e2p_write_version(struct cl_chip *chip);
+int cl_e2p_get_addr(struct wiphy *wiphy, struct wireless_dev *wdev,
+                   void *data, int data_len);
+int cl_e2p_set_addr(struct wiphy *wiphy, struct wireless_dev *wdev,
+                   const void *data, int data_len);
+int cl_e2p_set_wiring_id(struct wiphy *wiphy, struct wireless_dev *wdev,
+                        const void *data, int data_len);
+int cl_e2p_help(struct wiphy *wiphy, struct wireless_dev *wdev,
+               void *data, int data_len);
+
+enum cl_e2p_cmd {
+       CL_E2P_GET_ADDR,
+       CL_E2P_GET_MAC,
+       CL_E2P_GET_SERIAL_NUMBER,
+       CL_E2P_GET_PWR_TABLE_ID,
+       CL_E2P_GET_FREQ_OFFSET,
+       CL_E2P_GET_WIRING_ID,
+       CL_E2P_GET_FEM_LUT,
+       CL_E2P_GET_PLATFORM_ID,
+       CL_E2P_GET_CALIB,
+       CL_E2P_GET_HEXDUMP,
+       CL_E2P_GET_TABLE,
+
+       CL_E2P_SET_ADDR,
+       CL_E2P_SET_MAC,
+       CL_E2P_SET_SERIAL_NUMBER,
+       CL_E2P_SET_PWR_TABLE_ID,
+       CL_E2P_SET_FREQ_OFFSET,
+       CL_E2P_SET_WIRING_ID,
+       CL_E2P_SET_FEM_LUT,
+       CL_E2P_SET_PLATFORM_ID,
+       CL_E2P_SET_CALIB,
+
+       CL_E2P_MAX
+};
+
+#endif /* CL_E2P_H */