diff mbox series

[RFC,v1,082/256] cl8k: add ext/vlan_dscp.h

Message ID 20210617160223.160998-83-viktor.barna@celeno.com (mailing list archive)
State RFC
Delegated to: Kalle Valo
Headers show
Series wireless: cl8k driver for Celeno IEEE 802.11ax devices | expand

Commit Message

Viktor Barna June 17, 2021, 3:59 p.m. UTC 
From: Viktor Barna <viktor.barna@celeno.com>

(Part of the split. Please, take a look at the cover letter for more
details).

Signed-off-by: Viktor Barna <viktor.barna@celeno.com>
---
 .../net/wireless/celeno/cl8k/ext/vlan_dscp.h  | 37 +++++++++++++++++++
 1 file changed, 37 insertions(+)
 create mode 100644 drivers/net/wireless/celeno/cl8k/ext/vlan_dscp.h

--
2.30.0
diff mbox series

Patch

diff --git a/drivers/net/wireless/celeno/cl8k/ext/vlan_dscp.h b/drivers/net/wireless/celeno/cl8k/ext/vlan_dscp.h
new file mode 100644
index 000000000000..d483aad2e724
--- /dev/null
+++ b/drivers/net/wireless/celeno/cl8k/ext/vlan_dscp.h
@@ -0,0 +1,37 @@ 
+/* SPDX-License-Identifier: MIT */
+/* Copyright(c) 2019-2021, Celeno Communications Ltd. */
+
+#ifndef CL_VLAN_DSCP_H
+#define CL_VLAN_DSCP_H
+
+#include <linux/ip.h>
+
+/* Length of packet field */
+#define LENGTH_VLAN_HDR 4
+
+/* Some VLAN parameters */
+#define ETH_VLAN    0x8100
+#define VID_MASK    0x0FFF
+#define PBIT_OFFSET 13
+
+/* Version field value of IP header */
+#define IP_V_IPV4 0x40
+#define IP_V_IPV6 0x60
+
+#define CL_UP_BY_L3 3
+#define CL_UP_BY_L2 2
+
+struct cl_hw;
+struct cl_vif;
+
+void cl_vlan_dscp_init(struct cl_hw *cl_hw);
+bool cl_vlan_dscp_is_enabled(struct cl_hw *cl_hw,
+                            struct cl_vif *cl_vif);
+u8 cl_vlan_dscp_check_ether_type(struct cl_hw *cl_hw,
+                                struct sk_buff *skb,
+                                u8 ap_idx);
+int cl_vlan_dscp_cli(struct cl_hw *cl_hw,
+                    struct cl_vif *cl_vif,
+                    char *data);
+
+#endif /* CL_VLAN_DSCP_H */